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authorRichard Henderson <richard.henderson@linaro.org>2023-04-25 09:13:27 +0100
committerRichard Henderson <richard.henderson@linaro.org>2023-04-25 09:13:27 +0100
commita14b8206c5edcbbad1c71256ea9b44c3b382a9f5 (patch)
tree6cf2c18008dd46929b1549e1ef8adbee4b92b881 /include
parent3f1b44bdc11d7f66a5514471b298b0f7b4498065 (diff)
parentc28db9e0002df2abf88283b41dce0be17e8b0888 (diff)
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
virtio,pc,pci: fixes, features, cleanups Mostly just fixes, cleanups all over the place. Some optimizations. More control over slot_reserved_mask. More feature bits supported for SVQ. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmRHQvAPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRpQc0H/RD+RXy7IAnmhkdCyjj0hM8pftPTwCJfrSCW # DLHP4c5jiKO5ngUoAv3YJdM77TBCXlJn6gceeKBrzhGUTtJ7dTLC+Udeq/jW43EF # /E2ldLLbTNFyUqW8yX7D+EVio7Jy4zXTHpczKCF5vO7MaVWS/b3QdCpmjXpEHLNb # janv24vQHHgmRwK96uIdIauJJT8aqYW0arn1po8anxuFS8ok9Tf8LTEF5uBHokJP # MriTwMaqMgRK+4rzh+b6wc7QC5GqIr44gFrsfFYuNOUY0+BizvGvUAtMt+B/XZwt # OF4RSShUh2bhsQoYwgvShfEsR/vWwOl3yMAhcsB+wMgMzMG8MUQ= # =e8DF # -----END PGP SIGNATURE----- # gpg: Signature made Tue 25 Apr 2023 04:03:12 AM BST # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [undefined] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (31 commits) hw/pci-bridge: Make PCIe and CXL PXB Devices inherit from TYPE_PXB_DEV hw/pci-bridge: pci_expander_bridge fix type in pxb_cxl_dev_reset() docs/specs: Convert pci-testdev.txt to rst docs/specs: Convert pci-serial.txt to rst docs/specs/pci-ids: Convert from txt to rST acpi: pcihp: allow repeating hot-unplug requests virtio: i2c: Check notifier helpers for VIRTIO_CONFIG_IRQ_IDX docs: Remove obsolete descriptions of SR-IOV support intel_iommu: refine iotlb hash calculation docs/cxl: Fix sentence MAINTAINERS: Add Eugenio PĂ©rez as vhost-shadow-virtqueue reviewer tests: bios-tables-test: replace memset with initializer hw/acpi: limit warning on acpi table size to pc machines older than version 2.3 Add my old and new work email mapping and use work email to support acpi vhost-user-blk-server: notify client about disk resize pci: avoid accessing slot_reserved_mask directly outside of pci.c hw: Add compat machines for 8.1 hw/i386/amd_iommu: Factor amdvi_pci_realize out of amdvi_sysbus_realize hw/i386/amd_iommu: Set PCI static/const fields via PCIDeviceClass hw/i386/amd_iommu: Move capab_offset from AMDVIState to AMDVIPCIState ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/hw/boards.h2
-rw-r--r--include/hw/cxl/cxl.h4
-rw-r--r--include/hw/i386/pc.h3
-rw-r--r--include/hw/pci/pci.h3
-rw-r--r--include/hw/pci/pci_bridge.h28
-rw-r--r--include/hw/virtio/virtio.h1
6 files changed, 31 insertions, 10 deletions
diff --git a/include/hw/boards.h b/include/hw/boards.h
index bf5fc9e3e7..f4117fdb9a 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -292,10 +292,12 @@ struct MachineClass {
* @base: address in guest physical address space where the memory
* address space for memory devices starts
* @mr: address space container for memory devices
+ * @dimm_size: the sum of plugged DIMMs' sizes
*/
typedef struct DeviceMemoryState {
hwaddr base;
MemoryRegion mr;
+ uint64_t dimm_size;
} DeviceMemoryState;
/**
diff --git a/include/hw/cxl/cxl.h b/include/hw/cxl/cxl.h
index b2cffbb364..c453983e83 100644
--- a/include/hw/cxl/cxl.h
+++ b/include/hw/cxl/cxl.h
@@ -23,12 +23,12 @@
#define CXL_WINDOW_MAX 10
-typedef struct PXBDev PXBDev;
+typedef struct PXBCXLDev PXBCXLDev;
typedef struct CXLFixedWindow {
uint64_t size;
char **targets;
- PXBDev *target_hbs[8];
+ PXBCXLDev *target_hbs[8];
uint8_t num_targets;
uint8_t enc_int_ways;
uint8_t enc_int_gran;
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index eb668e9034..84935fc958 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -127,6 +127,9 @@ struct PCMachineClass {
/* create kvmclock device even when KVM PV features are not exposed */
bool kvmclock_create_always;
+
+ /* resizable acpi blob compat */
+ bool resizable_acpi_blob;
};
#define TYPE_PC_MACHINE "generic-pc-machine"
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index d5a40cd058..935b4b91b4 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -287,6 +287,9 @@ void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq,
void pci_bus_map_irqs(PCIBus *bus, pci_map_irq_fn map_irq);
void pci_bus_irqs_cleanup(PCIBus *bus);
int pci_bus_get_irq_level(PCIBus *bus, int irq_num);
+uint32_t pci_bus_get_slot_reserved_mask(PCIBus *bus);
+void pci_bus_set_slot_reserved_mask(PCIBus *bus, uint32_t mask);
+void pci_bus_clear_slot_reserved_mask(PCIBus *bus, uint32_t mask);
/* 0 <= pin <= 3 0 = INTA, 1 = INTB, 2 = INTC, 3 = INTD */
static inline int pci_swizzle(int slot, int pin)
{
diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h
index 1677176b2a..01670e9e65 100644
--- a/include/hw/pci/pci_bridge.h
+++ b/include/hw/pci/pci_bridge.h
@@ -84,7 +84,7 @@ struct PCIBridge {
#define PCI_BRIDGE_DEV_PROP_SHPC "shpc"
typedef struct CXLHost CXLHost;
-struct PXBDev {
+typedef struct PXBDev {
/*< private >*/
PCIDevice parent_obj;
/*< public >*/
@@ -92,15 +92,27 @@ struct PXBDev {
uint8_t bus_nr;
uint16_t numa_node;
bool bypass_iommu;
+} PXBDev;
+
+typedef struct PXBPCIEDev {
+ /*< private >*/
+ PXBDev parent_obj;
+} PXBPCIEDev;
+
+#define TYPE_PXB_DEV "pxb"
+OBJECT_DECLARE_SIMPLE_TYPE(PXBDev, PXB_DEV)
+
+typedef struct PXBCXLDev {
+ /*< private >*/
+ PXBPCIEDev parent_obj;
+ /*< public >*/
+
bool hdm_for_passthrough;
- struct cxl_dev {
- CXLHost *cxl_host_bridge; /* Pointer to a CXLHost */
- } cxl;
-};
+ CXLHost *cxl_host_bridge; /* Pointer to a CXLHost */
+} PXBCXLDev;
-#define TYPE_PXB_CXL_DEVICE "pxb-cxl"
-DECLARE_INSTANCE_CHECKER(PXBDev, PXB_CXL_DEV,
- TYPE_PXB_CXL_DEVICE)
+#define TYPE_PXB_CXL_DEV "pxb-cxl"
+OBJECT_DECLARE_SIMPLE_TYPE(PXBCXLDev, PXB_CXL_DEV)
int pci_bridge_ssvid_init(PCIDevice *dev, uint8_t offset,
uint16_t svid, uint16_t ssid,
diff --git a/include/hw/virtio/virtio.h b/include/hw/virtio/virtio.h
index f236e94ca6..f6b38f7e9c 100644
--- a/include/hw/virtio/virtio.h
+++ b/include/hw/virtio/virtio.h
@@ -309,6 +309,7 @@ int virtio_get_num_queues(VirtIODevice *vdev);
void virtio_queue_set_rings(VirtIODevice *vdev, int n, hwaddr desc,
hwaddr avail, hwaddr used);
void virtio_queue_update_rings(VirtIODevice *vdev, int n);
+void virtio_init_region_cache(VirtIODevice *vdev, int n);
void virtio_queue_set_align(VirtIODevice *vdev, int n, int align);
void virtio_queue_notify(VirtIODevice *vdev, int n);
uint16_t virtio_queue_vector(VirtIODevice *vdev, int n);