diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2018-09-24 18:49:11 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-09-24 18:49:11 +0100 |
| commit | 7c823bc581621a73c4d6c49f1d528d44a9ffc183 (patch) | |
| tree | 52a2e5f0035417922cb34406cd6fbd412142a1eb /include | |
| parent | 741e1a618b126e664f7b723e6fe1b7ace511caf7 (diff) | |
| parent | d2a1b1d602986a5f02658f6d4fc9ed422f8ddebf (diff) | |
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
pci, pc, virtio: fixes, features
pci resource capability + misc fixes everywhere.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
# gpg: Signature made Fri 07 Sep 2018 22:50:38 BST
# gpg: using RSA key 281F0DB8D28D5469
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>"
# gpg: aka "Michael S. Tsirkin <mst@redhat.com>"
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67
# Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469
* remotes/mst/tags/for_upstream:
tests: update acpi expected files
vhost: fix invalid downcast
pc: make sure that guest isn't able to unplug the first cpu
hw/pci: add PCI resource reserve capability to legacy PCI bridge
hw/pci: factor PCI reserve resources to a separate structure
virtio: update MemoryRegionCaches when guest negotiates features
pc: acpi: revert back to 1 SRAT entry for hotpluggable area
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/pci/pci_bridge.h | 18 |
1 files changed, 13 insertions, 5 deletions
diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h index 0347da52d2..cdff7edfd1 100644 --- a/include/hw/pci/pci_bridge.h +++ b/include/hw/pci/pci_bridge.h @@ -133,11 +133,19 @@ typedef struct PCIBridgeQemuCap { #define REDHAT_PCI_CAP_RESOURCE_RESERVE 1 +/* + * PCI BUS/IO/MEM/PREFMEM additional resources recorded as a + * capability in PCI configuration space to reserve on firmware init. + */ +typedef struct PCIResReserve { + uint32_t bus; + uint64_t io; + uint64_t mem_non_pref; + uint64_t mem_pref_32; + uint64_t mem_pref_64; +} PCIResReserve; + int pci_bridge_qemu_reserve_cap_init(PCIDevice *dev, int cap_offset, - uint32_t bus_reserve, uint64_t io_reserve, - uint64_t mem_non_pref_reserve, - uint64_t mem_pref_32_reserve, - uint64_t mem_pref_64_reserve, - Error **errp); + PCIResReserve res_reserve, Error **errp); #endif /* QEMU_PCI_BRIDGE_H */ |