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authorDamien Hedde <damien.hedde@greensocs.com>2020-04-06 15:52:49 +0200
committerPeter Maydell <peter.maydell@linaro.org>2020-04-30 15:35:41 +0100
commitb636db306e06ee1c267d6e15e3b5bc109252617f (patch)
tree14208dc493429ed2095af75b5c6a8d6a7631ce30 /include
parent38867cb7ec90253289cab22c13282a3ef6530f69 (diff)
hw/char/cadence_uart: add clock support
Switch the cadence uart to multi-phase reset and add the reference clock input. The input clock frequency is added to the migration structure. The reference clock controls the baudrate generation. If it disabled, any input characters and events are ignored. If this clock remains unconnected, the uart behaves as before (it default to a 50MHz ref clock). Signed-off-by: Damien Hedde <damien.hedde@greensocs.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200406135251.157596-8-damien.hedde@greensocs.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/hw/char/cadence_uart.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/char/cadence_uart.h b/include/hw/char/cadence_uart.h
index 47cec956c4..2a179a572f 100644
--- a/include/hw/char/cadence_uart.h
+++ b/include/hw/char/cadence_uart.h
@@ -49,6 +49,7 @@ typedef struct {
CharBackend chr;
qemu_irq irq;
QEMUTimer *fifo_trigger_handle;
+ Clock *refclk;
} CadenceUARTState;
static inline DeviceState *cadence_uart_create(hwaddr addr,