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authorPeter Maydell <peter.maydell@linaro.org>2016-07-20 21:32:56 +0100
committerPeter Maydell <peter.maydell@linaro.org>2016-07-20 21:32:56 +0100
commite66b05e9ca471715388182613217503160ed7a4d (patch)
tree42d50d35e80d75e3d6494c1fef25b793c2afc6bd /include
parent3b55fbdcb048bf82e82c29b555d0918b83fc40a5 (diff)
parent8fe6374e8e0c8dacb85e9e97897291541dd61be6 (diff)
Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into staging
x86 queue, 2016-07-20 # gpg: Signature made Wed 20 Jul 2016 16:07:38 BST # gpg: using RSA key 0x2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/x86-pull-request: (28 commits) pc: Make device_del CPU work for x86 CPUs target-i386: Add x86_cpu_unrealizefn() apic: Use apic_id as apic's migration instance_id (kvm)apic: Add unrealize callbacks apic: kvm-apic: Fix crash due to access to freed memory region apic: Drop APICCommonState.idx and use APIC ID as index in local_apics[] apic: move MAX_APICS check to 'apic' class pc: Implement query-hotpluggable-cpus callback pc: cpu: Allow device_add to be used with x86 cpu pc: Enforce adding CPUs contiguously and removing them in opposite order pc: Forbid BSP removal pc: Register created initial and hotpluged CPUs in one place pc_cpu_plug() pc: Delay setting number of boot CPUs to machine_done time pc: Set APIC ID based on socket/core/thread ids if it's not been set yet target-i386: Fix apic object leak when CPU is deleted target-i386: cpu: Do not ignore error and fix apic parent target-i386: Add support for UMIP and RDPID CPUID bits target-i386: Add socket/core/thread properties to X86CPU target-i386: Replace custom apic-id setter/getter with static property pc: cpu: Consolidate apic-id validity checks in pc_cpu_pre_plug() ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/hw/i386/apic_internal.h5
-rw-r--r--include/hw/i386/pc.h10
-rw-r--r--include/hw/i386/topology.h15
3 files changed, 27 insertions, 3 deletions
diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_internal.h
index 73ce71674f..06c4e9f6f9 100644
--- a/include/hw/i386/apic_internal.h
+++ b/include/hw/i386/apic_internal.h
@@ -121,8 +121,6 @@
#define VAPIC_ENABLE_BIT 0
#define VAPIC_ENABLE_MASK (1 << VAPIC_ENABLE_BIT)
-#define MAX_APICS 255
-
typedef struct APICCommonState APICCommonState;
#define TYPE_APIC_COMMON "apic-common"
@@ -138,6 +136,7 @@ typedef struct APICCommonClass
DeviceClass parent_class;
DeviceRealize realize;
+ DeviceUnrealize unrealize;
void (*set_base)(APICCommonState *s, uint64_t val);
void (*set_tpr)(APICCommonState *s, uint8_t val);
uint8_t (*get_tpr)(APICCommonState *s);
@@ -176,7 +175,6 @@ struct APICCommonState {
uint32_t initial_count;
int64_t initial_count_load_time;
int64_t next_time;
- int idx;
QEMUTimer *timer;
int64_t timer_expiry;
int sipi_vector;
@@ -185,6 +183,7 @@ struct APICCommonState {
uint32_t vapic_control;
DeviceState *vapic;
hwaddr vapic_paddr; /* note: persistence via kvmvapic */
+ bool legacy_instance_id;
};
typedef struct VAPICState {
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index e38c95a4da..bc937b989e 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -377,6 +377,16 @@ bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
.driver = "vmxnet3",\
.property = "romfile",\
.value = "",\
+ },\
+ {\
+ .driver = TYPE_X86_CPU,\
+ .property = "fill-mtrr-mask",\
+ .value = "off",\
+ },\
+ {\
+ .driver = "apic",\
+ .property = "legacy-instance-id",\
+ .value = "on",\
},
#define PC_COMPAT_2_5 \
diff --git a/include/hw/i386/topology.h b/include/hw/i386/topology.h
index fc95572394..1ebaee0f76 100644
--- a/include/hw/i386/topology.h
+++ b/include/hw/i386/topology.h
@@ -117,6 +117,21 @@ static inline void x86_topo_ids_from_idx(unsigned nr_cores,
topo->pkg_id = core_index / nr_cores;
}
+/* Calculate thread/core/package IDs for a specific topology,
+ * based on APIC ID
+ */
+static inline void x86_topo_ids_from_apicid(apic_id_t apicid,
+ unsigned nr_cores,
+ unsigned nr_threads,
+ X86CPUTopoInfo *topo)
+{
+ topo->smt_id = apicid &
+ ~(0xFFFFFFFFUL << apicid_smt_width(nr_cores, nr_threads));
+ topo->core_id = (apicid >> apicid_core_offset(nr_cores, nr_threads)) &
+ ~(0xFFFFFFFFUL << apicid_core_width(nr_cores, nr_threads));
+ topo->pkg_id = apicid >> apicid_pkg_offset(nr_cores, nr_threads);
+}
+
/* Make APIC ID for the CPU 'cpu_index'
*
* 'cpu_index' is a sequential, contiguous ID for the CPU.