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authorJean-Philippe Brucker <jean-philippe@linaro.org>2023-02-14 17:19:21 +0000
committerPeter Maydell <peter.maydell@linaro.org>2023-02-16 16:00:48 +0000
commitca3fbed896ec867ea0826b9859c6636ca927e835 (patch)
tree6210a33982b77d4c54a9b9fc6e20d43f6c9b0843 /include
parent4d120d7d6084ef388a9016d7dbf091c4d5e055fc (diff)
hw/arm/smmu-common: Support 64-bit addresses
Addresses targeting the second translation table (TTB1) in the SMMU have all upper bits set. Ensure the IOMMU region covers all 64 bits. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20230214171921.1917916-2-jean-philippe@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/hw/arm/smmu-common.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h
index c5683af07d..9fcff26357 100644
--- a/include/hw/arm/smmu-common.h
+++ b/include/hw/arm/smmu-common.h
@@ -27,8 +27,6 @@
#define SMMU_PCI_DEVFN_MAX 256
#define SMMU_PCI_DEVFN(sid) (sid & 0xFF)
-#define SMMU_MAX_VA_BITS 48
-
/*
* Page table walk error types
*/