diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2020-11-02 16:52:17 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-11-02 16:52:17 +0000 |
| commit | c20a135a7a14d846699b0cfc9f74bcc2a226bee6 (patch) | |
| tree | 9120ea53f221fddd9bac82e4e1a73ab53838402f /include | |
| parent | 76346b6264a9b01979829a5d4366c3799e2dd15a (diff) | |
hw/intc/arm_gicv3_cpuif: Make GIC maintenance interrupts work
In gicv3_init_cpuif() we copy the ARMCPU gicv3_maintenance_interrupt
into the GICv3CPUState struct's maintenance_irq field. This will
only work if the board happens to have already wired up the CPU
maintenance IRQ before the GIC was realized. Unfortunately this is
not the case for the 'virt' board, and so the value that gets copied
is NULL (since a qemu_irq is really a pointer to an IRQState struct
under the hood). The effect is that the CPU interface code never
actually raises the maintenance interrupt line.
Instead, since the GICv3CPUState has a pointer to the CPUState, make
the dereference at the point where we want to raise the interrupt, to
avoid an implicit requirement on board code to wire things up in a
particular order.
Reported-by: Jose Martins <josemartins90@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20201009153904.28529-1-peter.maydell@linaro.org
Reviewed-by: Luc Michel <luc@lmichel.fr>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/intc/arm_gicv3_common.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/include/hw/intc/arm_gicv3_common.h b/include/hw/intc/arm_gicv3_common.h index 0331b0ffdb..91491a2f66 100644 --- a/include/hw/intc/arm_gicv3_common.h +++ b/include/hw/intc/arm_gicv3_common.h @@ -153,7 +153,6 @@ struct GICv3CPUState { qemu_irq parent_fiq; qemu_irq parent_virq; qemu_irq parent_vfiq; - qemu_irq maintenance_irq; /* Redistributor */ uint32_t level; /* Current IRQ level */ |