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authorRichard Henderson <richard.henderson@linaro.org>2022-07-05 16:30:52 +0530
committerRichard Henderson <richard.henderson@linaro.org>2022-07-05 16:30:52 +0530
commit19361471b59441cd6f2aa22d4fbee7a6e9e76586 (patch)
treed4cf184b9d138c117e58339d5c2f1cc9bc534e34 /include
parent1437479e5ee1a49ccd84cad9e7b010fb2ee9d805 (diff)
parentbf7ce37f8f40149dfa354bdb74810c8e586a11e4 (diff)
Merge tag 'pull-la-20220705' of https://gitlab.com/rth7680/qemu into staging
Loongarch patch queue: Build fix for --enable-debug --enable-tcg-interpreter. Build fix for ls7a_rtc. Clear tlb on reset. Fixes for ipi mailboxes. Minor tweak to scripts/qemu-binfmt-conf. # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmLEGVIdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+SYAgAqMk+GHMT6VQANEsk # So58d9WCPG0XSavowl9oD4w/YSSvPZe5P4KVpJbC3WAgVwEI0RRKTX3RMAeg5z0I # zEEzFUSplSl7cO/7vQG86JRf5C7C/n4V9Q1pQUstNnTEf1s7MdgcG9597OZbV+cF # G5KY1RTQRUr6gpChZQSrv+6j6+aQCA5ZgNwjiVnkBjsNefz1GVFKYppanwHXmMiX # qjxVLgZb1FwOysiKpHKObLsC9pV7ub0QKrlBBk90UyidNjXxcLvV+oQrkyaVwB0m # UM/NN/x5Ive2dqEDfq007TXUc1RpFgwDvKU8EffavBYxx8hCed3DysroiYN+v2MK # qoYWmg== # =+zUy # -----END PGP SIGNATURE----- # gpg: Signature made Tue 05 Jul 2022 04:28:26 PM +0530 # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate] * tag 'pull-la-20220705' of https://gitlab.com/rth7680/qemu: hw/intc/loongarch_ipi: Fix mail send and any send function hw/intc/loongarch_ipi: Fix ipi device access of 64bits tcg/tci: Remove CONFIG_DEBUG_TCG_INTERPRETER scripts/qemu-binfmt-conf: Add LoongArch to qemu_get_family() target/loongarch: Clean up tlb when cpu reset hw/rtc/ls7a_rtc: Drop unused inline functions Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/hw/intc/loongarch_ipi.h7
1 files changed, 4 insertions, 3 deletions
diff --git a/include/hw/intc/loongarch_ipi.h b/include/hw/intc/loongarch_ipi.h
index 996ed7ea93..0ee48fca55 100644
--- a/include/hw/intc/loongarch_ipi.h
+++ b/include/hw/intc/loongarch_ipi.h
@@ -24,8 +24,9 @@
#define IOCSR_MAIL_SEND 0x48
#define IOCSR_ANY_SEND 0x158
-/* IPI system memory address */
-#define IPI_SYSTEM_MEM 0x1fe01000
+#define MAIL_SEND_ADDR (SMP_IPI_MAILBOX + IOCSR_MAIL_SEND)
+#define MAIL_SEND_OFFSET 0
+#define ANY_SEND_OFFSET (IOCSR_ANY_SEND - IOCSR_MAIL_SEND)
#define MAX_IPI_CORE_NUM 4
#define MAX_IPI_MBX_NUM 4
@@ -46,7 +47,7 @@ typedef struct IPICore {
struct LoongArchIPI {
SysBusDevice parent_obj;
MemoryRegion ipi_iocsr_mem[MAX_IPI_CORE_NUM];
- MemoryRegion ipi_system_mem[MAX_IPI_CORE_NUM];
+ MemoryRegion ipi64_iocsr_mem[MAX_IPI_CORE_NUM];
};
#endif