diff options
author | Anthony Liguori <aliguori@us.ibm.com> | 2013-05-02 10:57:01 -0500 |
---|---|---|
committer | Anthony Liguori <aliguori@us.ibm.com> | 2013-05-02 10:57:01 -0500 |
commit | 8ca27ce2e1150486ea2db4116a03706b28294f16 (patch) | |
tree | 39a42b9ba7a4b1fc8db8c098fd24b08f39fee6ed /include | |
parent | 0db4c324a8c6f2b1b8a118146f9b0fc8c4210719 (diff) | |
parent | e7bdf659c16e1cefd61f53648503d8c060668d6b (diff) |
Merge remote-tracking branch 'afaerber/qom-cpu' into staging
# By Igor Mammedov (21) and others
# Via Andreas Färber
* afaerber/qom-cpu: (29 commits)
Drop redundant resume_all_vcpus() from main()
cpus: Fix pausing TCG CPUs while in vCPU thread
target-i386: Replace cpuid_*features fields with a feature word array
target-i386: Break CPUID feature definition lines
target-i386/kvm.c: Code formatting changes
target-i386: Group together level, xlevel, xlevel2 fields
pc: Implement QEMUMachine::hot_add_cpu hook
QMP: Add cpu-add command
Add hot_add_cpu hook to QEMUMachine
target-i386: Move APIC to ICC bus
target-i386: Attach ICC bus to CPU on its creation
target-i386: Introduce ICC bus/device/bridge
cpu: Move cpu_write_elfXX_note() functions to CPUState
kvmvapic: Make dependency on sysbus.h explicit
target-i386: Replace MSI_SPACE_SIZE with APIC_SPACE_SIZE
target-i386: Do not allow to set apic-id once CPU is realized
target-i386: Introduce apic-id CPU property
target-i386: Introduce feat2prop() for CPU properties
acpi_piix4: Add infrastructure to send CPU hot-plug GPE to guest
cpu: Add helper cpu_exists(), to check if CPU with specified id exists
...
Diffstat (limited to 'include')
-rw-r--r-- | include/hw/boards.h | 3 | ||||
-rw-r--r-- | include/hw/cpu/icc_bus.h | 82 | ||||
-rw-r--r-- | include/hw/i386/apic_internal.h | 8 | ||||
-rw-r--r-- | include/hw/i386/pc.h | 3 | ||||
-rw-r--r-- | include/hw/timer/mc146818rtc.h | 1 | ||||
-rw-r--r-- | include/qom/cpu.h | 77 | ||||
-rw-r--r-- | include/sysemu/dump.h | 9 | ||||
-rw-r--r-- | include/sysemu/kvm.h | 24 | ||||
-rw-r--r-- | include/sysemu/sysemu.h | 3 |
9 files changed, 183 insertions, 27 deletions
diff --git a/include/hw/boards.h b/include/hw/boards.h index 425bdc74a8..fb7c6f1243 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -22,12 +22,15 @@ typedef void QEMUMachineInitFunc(QEMUMachineInitArgs *args); typedef void QEMUMachineResetFunc(void); +typedef void QEMUMachineHotAddCPUFunc(const int64_t id, Error **errp); + typedef struct QEMUMachine { const char *name; const char *alias; const char *desc; QEMUMachineInitFunc *init; QEMUMachineResetFunc *reset; + QEMUMachineHotAddCPUFunc *hot_add_cpu; BlockInterfaceType block_default_type; int max_cpus; unsigned int no_serial:1, diff --git a/include/hw/cpu/icc_bus.h b/include/hw/cpu/icc_bus.h new file mode 100644 index 0000000000..b5500708dc --- /dev/null +++ b/include/hw/cpu/icc_bus.h @@ -0,0 +1,82 @@ +/* icc_bus.h + * emulate x86 ICC (Interrupt Controller Communications) bus + * + * Copyright (c) 2013 Red Hat, Inc + * + * Authors: + * Igor Mammedov <imammedo@redhat.com> + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see <http://www.gnu.org/licenses/> + */ +#ifndef ICC_BUS_H +#define ICC_BUS_H + +#include "exec/memory.h" +#include "hw/qdev-core.h" + +#define TYPE_ICC_BUS "icc-bus" + +#ifndef CONFIG_USER_ONLY + +/** + * ICCBus: + * + * ICC bus + */ +typedef struct ICCBus { + /*< private >*/ + BusState parent_obj; + /*< public >*/ + + MemoryRegion *apic_address_space; +} ICCBus; + +#define ICC_BUS(obj) OBJECT_CHECK(ICCBus, (obj), TYPE_ICC_BUS) + +/** + * ICCDevice: + * + * ICC device + */ +typedef struct ICCDevice { + /*< private >*/ + DeviceState qdev; + /*< public >*/ +} ICCDevice; + +/** + * ICCDeviceClass: + * @init: Initialization callback for derived classes. + * + * ICC device class + */ +typedef struct ICCDeviceClass { + /*< private >*/ + DeviceClass parent_class; + /*< public >*/ + + int (*init)(ICCDevice *dev); /* TODO replace with QOM realize */ +} ICCDeviceClass; + +#define TYPE_ICC_DEVICE "icc-device" +#define ICC_DEVICE(obj) OBJECT_CHECK(ICCDevice, (obj), TYPE_ICC_DEVICE) +#define ICC_DEVICE_CLASS(klass) \ + OBJECT_CLASS_CHECK(ICCDeviceClass, (klass), TYPE_ICC_DEVICE) +#define ICC_DEVICE_GET_CLASS(obj) \ + OBJECT_GET_CLASS(ICCDeviceClass, (obj), TYPE_ICC_DEVICE) + +#define TYPE_ICC_BRIDGE "icc-bridge" + +#endif /* CONFIG_USER_ONLY */ +#endif diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_internal.h index 578241f861..1b0a7fbfad 100644 --- a/include/hw/i386/apic_internal.h +++ b/include/hw/i386/apic_internal.h @@ -21,7 +21,7 @@ #define QEMU_APIC_INTERNAL_H #include "exec/memory.h" -#include "hw/sysbus.h" +#include "hw/cpu/icc_bus.h" #include "qemu/timer.h" /* APIC Local Vector Table */ @@ -66,8 +66,6 @@ #define MAX_APICS 255 -#define MSI_SPACE_SIZE 0x100000 - typedef struct APICCommonState APICCommonState; #define TYPE_APIC_COMMON "apic-common" @@ -80,7 +78,7 @@ typedef struct APICCommonState APICCommonState; typedef struct APICCommonClass { - SysBusDeviceClass parent_class; + ICCDeviceClass parent_class; void (*init)(APICCommonState *s); void (*set_base)(APICCommonState *s, uint64_t val); @@ -94,7 +92,7 @@ typedef struct APICCommonClass } APICCommonClass; struct APICCommonState { - SysBusDevice busdev; + ICCDevice busdev; MemoryRegion io_memory; X86CPU *cpu; diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index dd6bc249bf..41869e56e9 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -78,7 +78,8 @@ extern int fd_bootchk; void pc_register_ferr_irq(qemu_irq irq); void pc_acpi_smi_interrupt(void *opaque, int irq, int level); -void pc_cpus_init(const char *cpu_model); +void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge); +void pc_hot_add_cpu(const int64_t id, Error **errp); void pc_acpi_init(const char *default_dsdt); void *pc_memory_init(MemoryRegion *system_memory, const char *kernel_filename, diff --git a/include/hw/timer/mc146818rtc.h b/include/hw/timer/mc146818rtc.h index 425bd179a4..753dda6ae7 100644 --- a/include/hw/timer/mc146818rtc.h +++ b/include/hw/timer/mc146818rtc.h @@ -8,6 +8,7 @@ ISADevice *rtc_init(ISABus *bus, int base_year, qemu_irq intercept_irq); void rtc_set_memory(ISADevice *dev, int addr, int val); +int rtc_get_memory(ISADevice *dev, int addr); void rtc_set_date(ISADevice *dev, const struct tm *tm); #endif /* !MC146818RTC_H */ diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 3664a1b631..7cd9442503 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -24,6 +24,8 @@ #include "hw/qdev-core.h" #include "qemu/thread.h" +typedef int (*WriteCoreDumpFunction)(void *buf, size_t size, void *opaque); + /** * SECTION:cpu * @section_id: QEMU-cpu @@ -45,6 +47,7 @@ typedef struct CPUState CPUState; * instantiatable CPU type. * @reset: Callback to reset the #CPUState to its initial state. * @do_interrupt: Callback for interrupt handling. + * @get_arch_id: Callback for getting architecture-dependent CPU ID. * @vmsd: State description for migration. * * Represents a CPU family or model. @@ -58,8 +61,17 @@ typedef struct CPUClass { void (*reset)(CPUState *cpu); void (*do_interrupt)(CPUState *cpu); + int64_t (*get_arch_id)(CPUState *cpu); const struct VMStateDescription *vmsd; + int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu, + int cpuid, void *opaque); + int (*write_elf64_qemunote)(WriteCoreDumpFunction f, CPUState *cpu, + void *opaque); + int (*write_elf32_note)(WriteCoreDumpFunction f, CPUState *cpu, + int cpuid, void *opaque); + int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu, + void *opaque); } CPUClass; struct KVMState; @@ -125,6 +137,45 @@ struct CPUState { uint32_t halted; /* used by alpha, cris, ppc TCG */ }; +/** + * cpu_write_elf64_note: + * @f: pointer to a function that writes memory to a file + * @cpu: The CPU whose memory is to be dumped + * @cpuid: ID number of the CPU + * @opaque: pointer to the CPUState struct + */ +int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu, + int cpuid, void *opaque); + +/** + * cpu_write_elf64_qemunote: + * @f: pointer to a function that writes memory to a file + * @cpu: The CPU whose memory is to be dumped + * @cpuid: ID number of the CPU + * @opaque: pointer to the CPUState struct + */ +int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu, + void *opaque); + +/** + * cpu_write_elf32_note: + * @f: pointer to a function that writes memory to a file + * @cpu: The CPU whose memory is to be dumped + * @cpuid: ID number of the CPU + * @opaque: pointer to the CPUState struct + */ +int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu, + int cpuid, void *opaque); + +/** + * cpu_write_elf32_qemunote: + * @f: pointer to a function that writes memory to a file + * @cpu: The CPU whose memory is to be dumped + * @cpuid: ID number of the CPU + * @opaque: pointer to the CPUState struct + */ +int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu, + void *opaque); /** * cpu_reset: @@ -214,6 +265,15 @@ bool cpu_is_stopped(CPUState *cpu); void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data); /** + * qemu_for_each_cpu: + * @func: The function to be executed. + * @data: Data to pass to the function. + * + * Executes @func for each CPU. + */ +void qemu_for_each_cpu(void (*func)(CPUState *cpu, void *data), void *data); + +/** * qemu_get_cpu: * @index: The CPUState@cpu_index value of the CPU to obtain. * @@ -223,6 +283,16 @@ void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data); */ CPUState *qemu_get_cpu(int index); +/** + * cpu_exists: + * @id: Guest-exposed CPU ID to lookup. + * + * Search for CPU with specified ID. + * + * Returns: %true - CPU is found, %false - CPU isn't found. + */ +bool cpu_exists(int64_t id); + #ifndef CONFIG_USER_ONLY typedef void (*CPUInterruptHandler)(CPUState *, int); @@ -256,5 +326,12 @@ void cpu_interrupt(CPUState *cpu, int mask); */ void cpu_reset_interrupt(CPUState *cpu, int mask); +/** + * cpu_resume: + * @cpu: The CPU to resume. + * + * Resumes CPU, i.e. puts CPU into runnable state. + */ +void cpu_resume(CPUState *cpu); #endif diff --git a/include/sysemu/dump.h b/include/sysemu/dump.h index e25b7cfb73..b8c770f8d9 100644 --- a/include/sysemu/dump.h +++ b/include/sysemu/dump.h @@ -20,15 +20,6 @@ typedef struct ArchDumpInfo { int d_class; /* ELFCLASS32 or ELFCLASS64 */ } ArchDumpInfo; -typedef int (*write_core_dump_function)(void *buf, size_t size, void *opaque); -int cpu_write_elf64_note(write_core_dump_function f, CPUArchState *env, - int cpuid, void *opaque); -int cpu_write_elf32_note(write_core_dump_function f, CPUArchState *env, - int cpuid, void *opaque); -int cpu_write_elf64_qemunote(write_core_dump_function f, CPUArchState *env, - void *opaque); -int cpu_write_elf32_qemunote(write_core_dump_function f, CPUArchState *env, - void *opaque); int cpu_get_dump_info(ArchDumpInfo *info); ssize_t cpu_get_note_size(int class, int machine, int nr_cpus); diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h index 75bd7d9934..9735c1dee6 100644 --- a/include/sysemu/kvm.h +++ b/include/sysemu/kvm.h @@ -144,10 +144,10 @@ int kvm_cpu_exec(CPUArchState *env); #if !defined(CONFIG_USER_ONLY) void *kvm_vmalloc(ram_addr_t size); void *kvm_arch_vmalloc(ram_addr_t size); -void kvm_setup_guest_memory(void *start, size_t size); +#endif +void kvm_setup_guest_memory(void *start, size_t size); void kvm_flush_coalesced_mmio_buffer(void); -#endif int kvm_insert_breakpoint(CPUArchState *current_env, target_ulong addr, target_ulong len, int type); @@ -250,8 +250,6 @@ int kvm_check_extension(KVMState *s, unsigned int extension); uint32_t kvm_arch_get_supported_cpuid(KVMState *env, uint32_t function, uint32_t index, int reg); void kvm_cpu_synchronize_state(CPUArchState *env); -void kvm_cpu_synchronize_post_reset(CPUState *cpu); -void kvm_cpu_synchronize_post_init(CPUState *cpu); /* generic hooks - to be moved/refactored once there are more users */ @@ -262,6 +260,16 @@ static inline void cpu_synchronize_state(CPUArchState *env) } } +#if !defined(CONFIG_USER_ONLY) +int kvm_physical_memory_addr_from_host(KVMState *s, void *ram_addr, + hwaddr *phys_addr); +#endif + +#endif /* NEED_CPU_H */ + +void kvm_cpu_synchronize_post_reset(CPUState *cpu); +void kvm_cpu_synchronize_post_init(CPUState *cpu); + static inline void cpu_synchronize_post_reset(CPUState *cpu) { if (kvm_enabled()) { @@ -276,14 +284,6 @@ static inline void cpu_synchronize_post_init(CPUState *cpu) } } - -#if !defined(CONFIG_USER_ONLY) -int kvm_physical_memory_addr_from_host(KVMState *s, void *ram_addr, - hwaddr *phys_addr); -#endif - -#endif - int kvm_irqchip_add_msi_route(KVMState *s, MSIMessage msg); int kvm_irqchip_update_msi_route(KVMState *s, int virq, MSIMessage msg); void kvm_irqchip_release_virq(KVMState *s, int virq); diff --git a/include/sysemu/sysemu.h b/include/sysemu/sysemu.h index 010e412f0c..2fb71afa25 100644 --- a/include/sysemu/sysemu.h +++ b/include/sysemu/sysemu.h @@ -153,6 +153,9 @@ void do_pci_device_hot_remove(Monitor *mon, const QDict *qdict); /* generic hotplug */ void drive_hot_add(Monitor *mon, const QDict *qdict); +/* CPU hotplug */ +void qemu_register_cpu_added_notifier(Notifier *notifier); + /* pcie aer error injection */ void pcie_aer_inject_error_print(Monitor *mon, const QObject *data); int do_pcie_aer_inject_error(Monitor *mon, |