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authorPeter Maydell <peter.maydell@linaro.org>2019-01-24 12:01:02 +0000
committerPeter Maydell <peter.maydell@linaro.org>2019-01-24 12:01:02 +0000
commit3e821195b16777aeec3641e3b42043dc8952821f (patch)
tree7922b3f4bd1272a066059e706de9f393f7d585cc /include
parent6d809e7da943bb4b95b408fbf3d80d097c0f7d38 (diff)
parent7617010250822677348af2bd98f048be10e7f334 (diff)
Merge remote-tracking branch 'remotes/stsquad/tags/pull-fpu-next-230119-2' into staging
Some more softfloat/fpu fixes - make check-softfloat - fixes for fp-bench - workaround broken host fma - compile fix for s390x/clang - fixed for bigendian (v2) - minor makefile tweaks (v2) # gpg: Signature made Wed 23 Jan 2019 11:37:53 GMT # gpg: using RSA key FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-fpu-next-230119-2: tests/Makefile: add check-softfloat rule scripts/archive-source: include softfloat tests tests/Makefile: add floating point tests include/fpu/softfloat: Fix compilation with Clang on s390x softfloat: enforce softfloat if the host's FMA is broken tests/fp/platform.h: include config-host.h fp-test: fix signature of slow_clear_flags and qemu_clear_flags tests/fp/Makefile: do not use gcc-only -W flags berkeley-testfloat-3: pull changes fp-bench: remove wrong exponent raise in fill_random fp-bench: fix update_random_ops Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/fpu/softfloat-macros.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/fpu/softfloat-macros.h b/include/fpu/softfloat-macros.h
index b1d772e6d4..bd5b6418e3 100644
--- a/include/fpu/softfloat-macros.h
+++ b/include/fpu/softfloat-macros.h
@@ -641,7 +641,7 @@ static inline uint64_t udiv_qrnnd(uint64_t *r, uint64_t n1,
uint64_t q;
asm("divq %4" : "=a"(q), "=d"(*r) : "0"(n0), "1"(n1), "rm"(d));
return q;
-#elif defined(__s390x__)
+#elif defined(__s390x__) && !defined(__clang__)
/* Need to use a TImode type to get an even register pair for DLGR. */
unsigned __int128 n = (unsigned __int128)n1 << 64 | n0;
asm("dlgr %0, %1" : "+r"(n) : "r"(d));