diff options
| author | Cédric Le Goater <clg@kaod.org> | 2017-04-14 10:35:00 +0200 |
|---|---|---|
| committer | Jason Wang <jasowang@redhat.com> | 2017-04-24 11:30:03 +0800 |
| commit | bd44300d1afc32b19043697f7f585dd5a2e8df42 (patch) | |
| tree | bfb85c85c9a0475425f7efc0a9811178726f4963 /include | |
| parent | 30adcc8fab3fa5aa569ea804b3ad469895294fb4 (diff) | |
net: add FTGMAC100 support
The FTGMAC100 device is an Ethernet controller with DMA function that
can be found on Aspeed SoCs (which include NCSI).
It is fully compliant with IEEE 802.3 specification for 10/100 Mbps
Ethernet and IEEE 802.3z specification for 1000 Mbps Ethernet and
includes Reduced Media Independent Interface (RMII) and Reduced
Gigabit Media Independent Interface (RGMII) interfaces. It adopts an
AHB bus interface and integrates a link list DMA engine with direct
M-Bus accesses for transmitting and receiving packets. It has
independent TX/RX fifos, supports half and full duplex (1000 Mbps mode
only supports full duplex), flow control for full duplex and
backpressure for half duplex.
The FTGMAC100 also implements IP, TCP, UDP checksum offloads and
supports IEEE 802.1Q VLAN tag insertion and removal. It offers
high-priority transmit queue for QoS and CoS applications
This model is backed with a RealTek 8211E PHY which is the chip found
on the AST2500 EVB. It is complete enough to satisfy two different
Linux drivers and a U-Boot driver. Not supported features are :
- IEEE 802.1Q VLAN
- High Priority Transmit Queue
- Wake-On-LAN functions
The code is based on the Coldfire Fast Ethernet Controller model.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/net/ftgmac100.h | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/include/hw/net/ftgmac100.h b/include/hw/net/ftgmac100.h new file mode 100644 index 0000000000..962a718f43 --- /dev/null +++ b/include/hw/net/ftgmac100.h @@ -0,0 +1,60 @@ +/* + * Faraday FTGMAC100 Gigabit Ethernet + * + * Copyright (C) 2016-2017, IBM Corporation. + * + * This code is licensed under the GPL version 2 or later. See the + * COPYING file in the top-level directory. + */ + +#ifndef FTGMAC100_H +#define FTGMAC100_H + +#define TYPE_FTGMAC100 "ftgmac100" +#define FTGMAC100(obj) OBJECT_CHECK(FTGMAC100State, (obj), TYPE_FTGMAC100) + +#include "hw/sysbus.h" +#include "net/net.h" + +typedef struct FTGMAC100State { + /*< private >*/ + SysBusDevice parent_obj; + + /*< public >*/ + NICState *nic; + NICConf conf; + qemu_irq irq; + MemoryRegion iomem; + + uint8_t *frame; + + uint32_t irq_state; + uint32_t isr; + uint32_t ier; + uint32_t rx_enabled; + uint32_t rx_ring; + uint32_t rx_descriptor; + uint32_t tx_ring; + uint32_t tx_descriptor; + uint32_t math[2]; + uint32_t rbsr; + uint32_t itc; + uint32_t aptcr; + uint32_t dblac; + uint32_t revr; + uint32_t fear1; + uint32_t tpafcr; + uint32_t maccr; + uint32_t phycr; + uint32_t phydata; + uint32_t fcr; + + + uint32_t phy_status; + uint32_t phy_control; + uint32_t phy_advertise; + uint32_t phy_int; + uint32_t phy_int_mask; +} FTGMAC100State; + +#endif |