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authorAlexander Wagner <alexander.wagner@ulal.de>2021-03-09 16:21:30 +0100
committerAlistair Francis <alistair.francis@wdc.com>2021-03-22 21:54:40 -0400
commit82a4ed8e5014ee814c63be33987e6783d5eacce2 (patch)
treecf3d201721301c39b3442d2eb73e95fb7c2121ab /include
parent5e437d3ccdccfd85f6e69ca60f921be2dab62c3c (diff)
hw/char: disable ibex uart receive if the buffer is full
Not disabling the UART leads to QEMU overwriting the UART receive buffer with the newest received byte. The rx_level variable is added to allow the use of the existing OpenTitan driver libraries. Signed-off-by: Alexander Wagner <alexander.wagner@ulal.de> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210309152130.13038-1-alexander.wagner@ulal.de Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'include')
-rw-r--r--include/hw/char/ibex_uart.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/hw/char/ibex_uart.h b/include/hw/char/ibex_uart.h
index 03d19e3f6f..546f958eb8 100644
--- a/include/hw/char/ibex_uart.h
+++ b/include/hw/char/ibex_uart.h
@@ -62,6 +62,8 @@ REG32(FIFO_CTRL, 0x1c)
FIELD(FIFO_CTRL, RXILVL, 2, 3)
FIELD(FIFO_CTRL, TXILVL, 5, 2)
REG32(FIFO_STATUS, 0x20)
+ FIELD(FIFO_STATUS, TXLVL, 0, 5)
+ FIELD(FIFO_STATUS, RXLVL, 16, 5)
REG32(OVRD, 0x24)
REG32(VAL, 0x28)
REG32(TIMEOUT_CTRL, 0x2c)
@@ -82,6 +84,8 @@ struct IbexUartState {
uint8_t tx_fifo[IBEX_UART_TX_FIFO_SIZE];
uint32_t tx_level;
+ uint32_t rx_level;
+
QEMUTimer *fifo_trigger_handle;
uint64_t char_tx_time;