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authorCorey Minyard <cminyard@mvista.com>2018-11-14 14:41:01 -0600
committerCorey Minyard <cminyard@mvista.com>2019-02-27 21:06:08 -0600
commit52cc6a492b6c6e668f99e13d3cfad5caf7fbfd1c (patch)
treeff033e8f508dcf2b31fbd9107df569488ce51462 /include
parent7fccf2a06890e3bc3b30e29827ad3fb93fe88fea (diff)
i2c:pm_smbus: Fix pm_smbus handling of I2C block read
The I2C block read function of pm_smbus was completely broken. It required doing some direct I2C handling because it didn't have a defined size, the OS code just reads bytes until it marks the transaction finished. This also required adjusting how the AMIBIOS workaround code worked, the I2C block mode was setting STS_HOST_BUSY during a transaction, so that bit could no longer be used to inform the host status read code to start the transaction. Create a explicit bool for that operation. Also, don't read the next byte from the device in byte-by-byte mode unless the OS is actually clearing the byte done bit. Just assuming that's what the OS is doing is a bad idea. Signed-off-by: Corey Minyard <cminyard@mvista.com>
Diffstat (limited to 'include')
-rw-r--r--include/hw/i2c/pm_smbus.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/include/hw/i2c/pm_smbus.h b/include/hw/i2c/pm_smbus.h
index 6dd5b7040b..7bcca97672 100644
--- a/include/hw/i2c/pm_smbus.h
+++ b/include/hw/i2c/pm_smbus.h
@@ -33,6 +33,12 @@ typedef struct PMSMBus {
/* Set on block transfers after the last byte has been read, so the
INTR bit can be set at the right time. */
bool op_done;
+
+ /* Set during an I2C block read, so we know how to handle data. */
+ bool in_i2c_block_read;
+
+ /* Used to work around a bug in AMIBIOS, see smb_transaction_start() */
+ bool start_transaction_on_status_read;
} PMSMBus;
void pm_smbus_init(DeviceState *parent, PMSMBus *smb, bool force_aux_blk);