diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2017-01-16 18:23:02 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2017-01-16 18:23:02 +0000 |
commit | a8c611e1133f97c979922f41103f79309339dc27 (patch) | |
tree | 73d1c11a4e395d2d71a4c6a5b77018986f8613d8 /include | |
parent | 2ccede18bd24fce5db83fef3674563a1f256717b (diff) | |
parent | d10eb08f5d8389c814b554d01aa2882ac58221bf (diff) |
Merge remote-tracking branch 'remotes/stsquad/tags/pull-tcg-common-tlb-reset-20170113-r1' into staging
This is the same as the v3 posted except a re-base and a few extra signoffs
# gpg: Signature made Fri 13 Jan 2017 14:26:46 GMT
# gpg: using RSA key 0xFBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>"
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44
* remotes/stsquad/tags/pull-tcg-common-tlb-reset-20170113-r1:
cputlb: drop flush_global flag from tlb_flush
cpu_common_reset: wrap TCG specific code in tcg_enabled()
qom/cpu: move tlb_flush to cpu_common_reset
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/exec/exec-all.h | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index a8c13cee66..bbc9478a50 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -95,15 +95,13 @@ void tlb_flush_page(CPUState *cpu, target_ulong addr); /** * tlb_flush: * @cpu: CPU whose TLB should be flushed - * @flush_global: ignored * - * Flush the entire TLB for the specified CPU. - * The flush_global flag is in theory an indicator of whether the whole - * TLB should be flushed, or only those entries not marked global. - * In practice QEMU does not implement any global/not global flag for - * TLB entries, and the argument is ignored. + * Flush the entire TLB for the specified CPU. Most CPU architectures + * allow the implementation to drop entries from the TLB at any time + * so this is generally safe. If more selective flushing is required + * use one of the other functions for efficiency. */ -void tlb_flush(CPUState *cpu, int flush_global); +void tlb_flush(CPUState *cpu); /** * tlb_flush_page_by_mmuidx: * @cpu: CPU whose TLB should be flushed @@ -165,7 +163,7 @@ static inline void tlb_flush_page(CPUState *cpu, target_ulong addr) { } -static inline void tlb_flush(CPUState *cpu, int flush_global) +static inline void tlb_flush(CPUState *cpu) { } |