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author | Peter Maydell <peter.maydell@linaro.org> | 2017-06-20 17:12:41 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2017-06-20 17:12:41 +0100 |
commit | e85c0d14014514a2f0faeae5b4c23fab5b234de4 (patch) | |
tree | d4c407959d3ca465e7f4ad9831e2d0da8bebe89d /include | |
parent | 65a0e3e842df7f73ff2e4a61948f992a41e570a8 (diff) | |
parent | 7f3cf2d6e7d1231d854902c9016823961e59d1f4 (diff) |
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
pc: fixes, cleanups, features
Some fixes and cleanups. Extended TSEG sizes.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
# gpg: Signature made Fri 16 Jun 2017 16:45:07 BST
# gpg: using RSA key 0x281F0DB8D28D5469
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>"
# gpg: aka "Michael S. Tsirkin <mst@redhat.com>"
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67
# Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469
* remotes/mst/tags/for_upstream:
hw/i386: fix nvdimm check error path
intel_iommu: cleanup vtd_interrupt_remap_msi()
intel_iommu: cleanup vtd_{do_}iommu_translate()
intel_iommu: switching the rest DPRINTF to trace
tests/q35-test: add TSEG size checks
tests/q35-test: push down qtest_start / qtest_end to test case(s)
q35/mch: implement extended TSEG sizes
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/hw/i386/pc.h | 5 | ||||
-rw-r--r-- | include/hw/pci-host/q35.h | 6 |
2 files changed, 11 insertions, 0 deletions
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index d071c9c0e9..233216abdc 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -384,6 +384,11 @@ bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); #define PC_COMPAT_2_9 \ HW_COMPAT_2_9 \ + {\ + .driver = "mch",\ + .property = "extended-tseg-mbytes",\ + .value = stringify(0),\ + },\ #define PC_COMPAT_2_8 \ HW_COMPAT_2_8 \ diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h index 53b6760c16..58983c00b3 100644 --- a/include/hw/pci-host/q35.h +++ b/include/hw/pci-host/q35.h @@ -60,6 +60,7 @@ typedef struct MCHPCIState { uint64_t above_4g_mem_size; uint64_t pci_hole64_size; uint32_t short_root_bus; + uint16_t ext_tseg_mbytes; } MCHPCIState; typedef struct Q35PCIHost { @@ -91,6 +92,11 @@ typedef struct Q35PCIHost { /* D0:F0 configuration space */ #define MCH_HOST_BRIDGE_REVISION_DEFAULT 0x0 +#define MCH_HOST_BRIDGE_EXT_TSEG_MBYTES 0x50 +#define MCH_HOST_BRIDGE_EXT_TSEG_MBYTES_SIZE 2 +#define MCH_HOST_BRIDGE_EXT_TSEG_MBYTES_QUERY 0xffff +#define MCH_HOST_BRIDGE_EXT_TSEG_MBYTES_MAX 0xfff + #define MCH_HOST_BRIDGE_PCIEXBAR 0x60 /* 64bit register */ #define MCH_HOST_BRIDGE_PCIEXBAR_SIZE 8 /* 64bit register */ #define MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT 0xb0000000 |