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authorPeter Maydell <peter.maydell@linaro.org>2014-02-26 22:53:50 +0000
committerPeter Maydell <peter.maydell@linaro.org>2014-02-26 22:53:51 +0000
commit2ce5868ca1457d1dcbaa917df98ca1ba28593e40 (patch)
tree1bd8e86817271d614d69eb047a6f0fe2edff728e /include
parent6f6831f61a44fde832ee6fab0cc5632de34cf6b7 (diff)
parentc04018e93390e31b40044f3db92c173fb0ccb3d2 (diff)
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20140226' into staging
target-arm queue: * fixes for various Coverity-spotted bugs * support new KVM device control API for VGIC * support KVM VGIC save/restore/migration * more AArch64 system mode foundations * support ARMv8 CRC instructions for A32/T32 * PL330 minor fixes and cleanup # gpg: Signature made Wed 26 Feb 2014 17:51:32 GMT using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" * remotes/pmaydell/tags/pull-target-arm-20140226: (45 commits) dma/pl330: implement dmaadnh instruction dma/pl330: Fix buffer depth dma/pl330: Add event debugging printfs dma/pl330: Rename parent_obj dma/pl330: printf format type sweep. dma/pl330: Fix misleading type dma/pl330: Delete overly verbose debug printf target-arm: Add support for AArch32 ARMv8 CRC32 instructions include/qemu/crc32c.h: Rename include guards to match filename target-arm: Add utility function for checking AA32/64 state of an EL target-arm: Implement AArch64 view of CPACR target-arm: A64: Implement MSR (immediate) instructions target-arm: Store AIF bits in env->pstate for AArch32 target-arm: A64: Implement WFI target-arm: Get MMU index information correct for A64 code target-arm: Implement AArch64 OSLAR_EL1 sysreg as WI target-arm: Implement AArch64 dummy breakpoint and watchpoint registers target-arm: Implement AArch64 ID and feature registers target-arm: Implement AArch64 generic timers target-arm: Implement AArch64 MPIDR ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/hw/intc/arm_gic_common.h1
-rw-r--r--include/qemu/crc32c.h4
-rw-r--r--include/sysemu/kvm.h34
3 files changed, 37 insertions, 2 deletions
diff --git a/include/hw/intc/arm_gic_common.h b/include/hw/intc/arm_gic_common.h
index 89384c2bb4..f6887ed92b 100644
--- a/include/hw/intc/arm_gic_common.h
+++ b/include/hw/intc/arm_gic_common.h
@@ -104,6 +104,7 @@ typedef struct GICState {
MemoryRegion cpuiomem[GIC_NCPU + 1]; /* CPU interfaces */
uint32_t num_irq;
uint32_t revision;
+ int dev_fd; /* kvm device fd if backed by kvm vgic support */
} GICState;
#define TYPE_ARM_GIC_COMMON "arm_gic_common"
diff --git a/include/qemu/crc32c.h b/include/qemu/crc32c.h
index 56d1c3bfde..dafb6a1ada 100644
--- a/include/qemu/crc32c.h
+++ b/include/qemu/crc32c.h
@@ -25,8 +25,8 @@
*
*/
-#ifndef QEMU_CRC32_H
-#define QEMU_CRC32_H
+#ifndef QEMU_CRC32C_H
+#define QEMU_CRC32C_H
#include "qemu-common.h"
diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h
index 3b25f27a7c..a02d67cd5a 100644
--- a/include/sysemu/kvm.h
+++ b/include/sysemu/kvm.h
@@ -194,6 +194,28 @@ int kvm_vm_ioctl(KVMState *s, int type, ...);
int kvm_vcpu_ioctl(CPUState *cpu, int type, ...);
+/**
+ * kvm_device_ioctl - call an ioctl on a kvm device
+ * @fd: The KVM device file descriptor as returned from KVM_CREATE_DEVICE
+ * @type: The device-ctrl ioctl number
+ *
+ * Returns: -errno on error, nonnegative on success
+ */
+int kvm_device_ioctl(int fd, int type, ...);
+
+/**
+ * kvm_create_device - create a KVM device for the device control API
+ * @KVMState: The KVMState pointer
+ * @type: The KVM device type (see Documentation/virtual/kvm/devices in the
+ * kernel source)
+ * @test: If true, only test if device can be created, but don't actually
+ * create the device.
+ *
+ * Returns: -errno on error, nonnegative on success: @test ? 0 : device fd;
+ */
+int kvm_create_device(KVMState *s, uint64_t type, bool test);
+
+
/* Arch specific hooks */
extern const KVMCapabilityInfo kvm_arch_required_capabilities[];
@@ -319,4 +341,16 @@ int kvm_irqchip_remove_irqfd_notifier(KVMState *s, EventNotifier *n, int virq);
void kvm_pc_gsi_handler(void *opaque, int n, int level);
void kvm_pc_setup_irq_routing(bool pci_enabled);
void kvm_init_irq_routing(KVMState *s);
+
+/**
+ * kvm_arch_irqchip_create:
+ * @KVMState: The KVMState pointer
+ *
+ * Allow architectures to create an in-kernel irq chip themselves.
+ *
+ * Returns: < 0: error
+ * 0: irq chip was not created
+ * > 0: irq chip was created
+ */
+int kvm_arch_irqchip_create(KVMState *s);
#endif