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authorPeter Maydell <peter.maydell@linaro.org>2014-05-13 13:16:37 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-05-13 13:16:37 +0100
commitcd2b9b86803e46a09cf239afc44413884efa53f4 (patch)
treedf975535f574d6846a27242e3a85229a17c0cd34 /include
parentfccae3226da3238eb857dfdf8f997434b168372c (diff)
parent96d0ee7f0950e725ef7a4f7516e0af6a08d303e0 (diff)
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20140512' into staging
tcg updates for 20140512 # gpg: Signature made Tue 13 May 2014 00:19:56 BST using RSA key ID 4DD0279B # gpg: Can't check signature: public key not found * remotes/rth/tags/pull-tcg-20140512: (26 commits) tcg: Remove unreachable code in tcg_out_op and op_defs tcg: Use tcg_target_available_regs in tcg_reg_alloc_mov tcg: Make call address a constant parameter tci: Create tcg_out_call tcg-mips: Split out tcg_out_call tcg-sparc: Create tcg_out_call tcg-ppc64: Rename tcg_out_calli to tcg_out_call tcg-ppc: Split out tcg_out_call tcg-s390: Rename tgen_calli to tcg_out_call tcg-i386: Rename tcg_out_calli to tcg_out_call tcg: Require TCG_TARGET_INSN_UNIT_SIZE tci: Define TCG_TARGET_INSN_UNIT_SIZE tcg-mips: Define TCG_TARGET_INSN_UNIT_SIZE tcg-ia64: Define TCG_TARGET_INSN_UNIT_SIZE tcg-s390: Define TCG_TARGET_INSN_UNIT_SIZE tcg-aarch64: Define TCG_TARGET_INSN_UNIT_SIZE tcg-arm: Define TCG_TARGET_INSN_UNIT_SIZE tcg-sparc: Define TCG_TARGET_INSN_UNIT_SIZE tcg-ppc: Define TCG_TARGET_INSN_UNIT_SIZE tcg-ppc64: Define TCG_TARGET_INSN_UNIT_SIZE ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/exec/exec-all.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index f9ac332f9d..0766e24f8e 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -145,7 +145,7 @@ struct TranslationBlock {
#define CF_COUNT_MASK 0x7fff
#define CF_LAST_IO 0x8000 /* Last insn may be an IO access. */
- uint8_t *tc_ptr; /* pointer to the translated code */
+ void *tc_ptr; /* pointer to the translated code */
/* next matching tb for physical address. */
struct TranslationBlock *phys_hash_next;
/* first and second physical page containing code. The lower bit
@@ -229,7 +229,7 @@ void ppc_tb_set_jmp_target(unsigned long jmp_addr, unsigned long addr);
static inline void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr)
{
/* patch the branch destination */
- *(uint32_t *)jmp_addr = addr - (jmp_addr + 4);
+ stl_p((void*)jmp_addr, addr - (jmp_addr + 4));
/* no need to flush icache explicitly */
}
#elif defined(__aarch64__)