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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2016-06-29 00:35:13 +0530
committerDavid Gibson <david@gibson.dropbear.id.au>2016-07-01 13:41:46 +1000
commit9c7027ba947d95dedaa760758cc378c8496e0316 (patch)
tree2193d4d36ac7815a4cc979dce7836c7bb51667b5 /include
parent161deaf225e70dee991744cd3164a30726a1b0eb (diff)
ppc/xics: Move SPAPR specific code to a separate file
Leave the core ICP/ICS logic in xics.c and move the top level class wrapper, hypercall and RTAS handlers to xics_spapr.c Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> [add cpu.h in xics_spapr.c, move set_nr_irqs and set_nr_servers to xics_spapr.c] Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'include')
-rw-r--r--include/hw/ppc/xics.h21
1 files changed, 21 insertions, 0 deletions
diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h
index c94677078a..33490060a0 100644
--- a/include/hw/ppc/xics.h
+++ b/include/hw/ppc/xics.h
@@ -146,6 +146,12 @@ struct ICSState {
XICSState *icp;
};
+static inline bool ics_valid_irq(ICSState *ics, uint32_t nr)
+{
+ return (nr >= ics->offset)
+ && (nr < (ics->offset + ics->nr_irqs));
+}
+
struct ICSIRQState {
uint32_t server;
uint8_t priority;
@@ -174,4 +180,19 @@ void xics_spapr_free(XICSState *icp, int irq, int num);
void xics_cpu_setup(XICSState *icp, PowerPCCPU *cpu);
void xics_cpu_destroy(XICSState *icp, PowerPCCPU *cpu);
+/* Internal XICS interfaces */
+int xics_get_cpu_index_by_dt_id(int cpu_dt_id);
+
+void icp_set_cppr(XICSState *icp, int server, uint8_t cppr);
+void icp_set_mfrr(XICSState *icp, int server, uint8_t mfrr);
+uint32_t icp_accept(ICPState *ss);
+void icp_eoi(XICSState *icp, int server, uint32_t xirr);
+
+void ics_write_xive(ICSState *ics, int nr, int server,
+ uint8_t priority, uint8_t saved_priority);
+
+void ics_set_irq_type(ICSState *ics, int srcno, bool lsi);
+
+int xics_find_source(XICSState *icp, int irq);
+
#endif /* __XICS_H__ */