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authorCédric Le Goater <clg@kaod.org>2019-11-25 07:58:06 +0100
committerDavid Gibson <david@gibson.dropbear.id.au>2019-12-17 10:39:47 +1100
commit5014c60261cf38b7c210831548c042982218a999 (patch)
tree16a7a9dd3de1b77f32015b9bd010d1c284e3b535 /include
parent4a89e20458ef6ef0979d9a05e41b421fe28a90a8 (diff)
ppc/pnv: Introduce a pnv_xive_is_cpu_enabled() helper
and use this helper to exclude CPUs which are not enabled in the XIVE controller. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20191125065820.927-7-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'include')
-rw-r--r--include/hw/ppc/pnv.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index 03cb429f21..12b0169a40 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -99,6 +99,11 @@ typedef struct Pnv9Chip {
PnvQuad *quads;
} Pnv9Chip;
+/*
+ * A SMT8 fused core is a pair of SMT4 cores.
+ */
+#define PNV9_PIR2FUSEDCORE(pir) (((pir) >> 3) & 0xf)
+
typedef struct PnvChipClass {
/*< private >*/
SysBusDeviceClass parent_class;