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| author | Peter Maydell <peter.maydell@linaro.org> | 2020-04-03 12:59:29 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-04-03 12:59:29 +0100 |
| commit | 64a3b4d53d344bd494bcf969ee89467b560c7ce0 (patch) | |
| tree | 6fc8f4031e84fe8e9014cd5df8849a21e6127d5d /include | |
| parent | f2a8261110c32c4dccd84e774d8dd7a0524e00fb (diff) | |
| parent | 5c30ef937f522a65df78dd9f496483fe4fc44d5e (diff) | |
Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20200403' into staging
- fix cpu number reporting in the stsi 3.2.2 block for kvm
- fix migration for old machines with odd ram sizes
# gpg: Signature made Fri 03 Apr 2020 10:11:06 BST
# gpg: using RSA key C3D0D66DC3624FF6A8C018CEDECF6B93C6F02FAF
# gpg: issuer "cohuck@redhat.com"
# gpg: Good signature from "Cornelia Huck <conny@cornelia-huck.de>" [marginal]
# gpg: aka "Cornelia Huck <huckc@linux.vnet.ibm.com>" [full]
# gpg: aka "Cornelia Huck <cornelia.huck@de.ibm.com>" [full]
# gpg: aka "Cornelia Huck <cohuck@kernel.org>" [marginal]
# gpg: aka "Cornelia Huck <cohuck@redhat.com>" [marginal]
# Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0 18CE DECF 6B93 C6F0 2FAF
* remotes/cohuck/tags/s390x-20200403:
vl/s390x: fixup ram sizes for compat machines
s390x: kvm: Fix number of cpu reports for stsi 3.2.2
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/boards.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/include/hw/boards.h b/include/hw/boards.h index 236d239c19..fd4d62b501 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -152,6 +152,12 @@ typedef struct { * It also will be used as a way to optin into "-m" option support. * If it's not set by board, '-m' will be ignored and generic code will * not create default RAM MemoryRegion. + * @fixup_ram_size: + * Amends user provided ram size (with -m option) using machine + * specific algorithm. To be used by old machine types for compat + * purposes only. + * Applies only to default memory backend, i.e., explicit memory backend + * wasn't used. */ struct MachineClass { /*< private >*/ @@ -218,6 +224,7 @@ struct MachineClass { unsigned cpu_index); const CPUArchIdList *(*possible_cpu_arch_ids)(MachineState *machine); int64_t (*get_default_cpu_node_id)(const MachineState *ms, int idx); + ram_addr_t (*fixup_ram_size)(ram_addr_t size); }; /** |