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authorPaulo Alcantara <pcacjr@gmail.com>2015-06-28 14:58:58 -0300
committerMichael S. Tsirkin <mst@redhat.com>2015-07-08 10:09:55 +0300
commit5add35bec1e249bb5345a47008c8f298d4760be4 (patch)
treefc4186d1a21bd7bc5868b175860507201e70a539 /include
parent45dcdb9da632b5a5e7639707e12b1b17029c5a1e (diff)
ich9: implement strap SPKR pin logic
If the signal is sampled high, this indicates that the system is strapped to the "No Reboot" mode (ICH9 will disable the TCO Timer system reboot feature). The status of this strap is readable via the NO_REBOOT bit (CC: offset 0x3410:bit 5). The NO_REBOOT bit is set when SPKR pin on ICH9 is sampled high. This bit may be set or cleared by software if the strap is sampled low but may not override the strap when it indicates "No Reboot". This patch implements the logic where hardware has ability to set SPKR pin through a property named "noreboot" and it's sampled high by default. Signed-off-by: Paulo Alcantara <pcacjr@zytor.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'include')
-rw-r--r--include/hw/i386/ich9.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h
index ecb3b1038c..b9d2b04b6e 100644
--- a/include/hw/i386/ich9.h
+++ b/include/hw/i386/ich9.h
@@ -46,6 +46,11 @@ typedef struct ICH9LPCState {
ICH9LPCPMRegs pm;
uint32_t sci_level; /* track sci level */
+ /* 2.24 Pin Straps */
+ struct {
+ bool spkr_hi;
+ } pin_strap;
+
/* 10.1 Chipset Configuration registers(Memory Space)
which is pointed by RCBA */
uint8_t chip_config[ICH9_CC_SIZE];