diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2018-06-15 14:57:16 +0100 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2018-06-15 15:23:34 +0100 |
commit | 1f871c5e6b0f30644a60a81a6a7aadb3afb030ac (patch) | |
tree | 335d1a996b0e4c8f36c08b65d2652a6f88a77f71 /include | |
parent | 2c91bcf273ffb95898d2ca901b699558d9e73fd1 (diff) |
exec.c: Handle IOMMUs in address_space_translate_for_iotlb()
Currently we don't support board configurations that put an IOMMU
in the path of the CPU's memory transactions, and instead just
assert() if the memory region fonud in address_space_translate_for_iotlb()
is an IOMMUMemoryRegion.
Remove this limitation by having the function handle IOMMUs.
This is mostly straightforward, but we must make sure we have
a notifier registered for every IOMMU that a transaction has
passed through, so that we can flush the TLB appropriately
when any of the IOMMUs change their mappings.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20180604152941.20374-5-peter.maydell@linaro.org
Diffstat (limited to 'include')
-rw-r--r-- | include/exec/exec-all.h | 3 | ||||
-rw-r--r-- | include/qom/cpu.h | 3 |
2 files changed, 5 insertions, 1 deletions
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index aed55aaaa7..8bbea787a9 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -478,7 +478,8 @@ void tb_flush_jmp_cache(CPUState *cpu, target_ulong addr); MemoryRegionSection * address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr, - hwaddr *xlat, hwaddr *plen); + hwaddr *xlat, hwaddr *plen, + MemTxAttrs attrs, int *prot); hwaddr memory_region_section_get_iotlb(CPUState *cpu, MemoryRegionSection *section, target_ulong vaddr, diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 9d3afc6c75..cce2fd6acc 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -429,6 +429,9 @@ struct CPUState { uint16_t pending_tlb_flush; int hvf_fd; + + /* track IOMMUs whose translations we've cached in the TCG TLB */ + GArray *iommu_notifiers; }; QTAILQ_HEAD(CPUTailQ, CPUState); |