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authorRichard Henderson <richard.henderson@linaro.org>2020-08-20 19:27:53 -0700
committerRichard Henderson <richard.henderson@linaro.org>2020-09-01 07:43:30 -0700
commit2271a6ac0a075d859b71551626e3cae9817ba7da (patch)
tree1b650e6769400c8ea2a39f3bdbe89f0d7edba0ac /include/tcg
parent683a247ed7a4993464e995106c20acbe237bdbfc (diff)
tcg: Add tcg_get_insn_start_param
MicroBlaze will shortly need to update a parameter in place. Add an interface to read to match that for write. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include/tcg')
-rw-r--r--include/tcg/tcg.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
index d40c925d04..53ce94c2c5 100644
--- a/include/tcg/tcg.h
+++ b/include/tcg/tcg.h
@@ -777,11 +777,26 @@ static inline TCGv_i32 TCGV_HIGH(TCGv_i64 t)
}
#endif
+static inline TCGArg tcg_get_insn_param(TCGOp *op, int arg)
+{
+ return op->args[arg];
+}
+
static inline void tcg_set_insn_param(TCGOp *op, int arg, TCGArg v)
{
op->args[arg] = v;
}
+static inline target_ulong tcg_get_insn_start_param(TCGOp *op, int arg)
+{
+#if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
+ return tcg_get_insn_param(op, arg);
+#else
+ return tcg_get_insn_param(op, arg * 2) |
+ ((uint64_t)tcg_get_insn_param(op, arg * 2 + 1) << 32);
+#endif
+}
+
static inline void tcg_set_insn_start_param(TCGOp *op, int arg, target_ulong v)
{
#if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS