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authorRichard Henderson <richard.henderson@linaro.org>2022-06-23 14:52:30 -0700
committerRichard Henderson <richard.henderson@linaro.org>2022-06-23 14:52:30 -0700
commit3a821c52e1a30ecd9a436f2c67cc66b5628c829f (patch)
tree57873bbe6aa3ddb6cc420350ed29e1aa438c14cd /include/sysemu
parent7db86fe2ed220c196061824e652b94e7a2acbabf (diff)
parent98836e8e012a959ec515c041e4fdd7f2ae87ae16 (diff)
Merge tag 'nvme-next-pull-request' of git://git.infradead.org/qemu-nvme into staging
hw/nvme updates - sriov functionality - odd fixes # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCAAdFiEEUigzqnXi3OaiR2bATeGvMW1PDekFAmK02wUACgkQTeGvMW1P # DenNPwgAwhQCXXacTb+6vEdxN30QoWygzQj5BLm//SiXlj7hBX7P/JqCxYF5vUDU # EaZkl4n3ry5T1xqlUWIBFdIAmKyrsWz2eKTrX41g64i/L+/nfJXZ+IgQc3WkM/FK # 5NwwAE8q/JGiRczLesF/9QvQq/90L6QtyC48bsS8AIcl5IcqHCKGwEJS7LErltex # YZDJyTNU4wB2XFophylJUL43GrHa/kUFA2ZHgs9iuH0p5LGG6UM3KoinBKcbwn47 # iEWKccvsHSyfE8VpJJS5STMEeGGaBPziZ654ElLmzVq6EXDKMCoX03naQ9Q8oSpl # FiktbxllCYdmECb44PNBEd/nLdpCdQ== # =o54a # -----END PGP SIGNATURE----- # gpg: Signature made Thu 23 Jun 2022 02:28:37 PM PDT # gpg: using RSA key 522833AA75E2DCE6A24766C04DE1AF316D4F0DE9 # gpg: Good signature from "Klaus Jensen <its@irrelevant.dk>" [unknown] # gpg: aka "Klaus Jensen <k.jensen@samsung.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: DDCA 4D9C 9EF9 31CC 3468 4272 63D5 6FC5 E55D A838 # Subkey fingerprint: 5228 33AA 75E2 DCE6 A247 66C0 4DE1 AF31 6D4F 0DE9 * tag 'nvme-next-pull-request' of git://git.infradead.org/qemu-nvme: hw/nvme: clear aen mask on reset Revert "hw/block/nvme: add support for sgl bit bucket descriptor" hw/nvme: clean up CC register write logic hw/acpi: Make the PCI hot-plug aware of SR-IOV hw/nvme: Update the initalization place for the AER queue docs: Add documentation for SR-IOV and Virtualization Enhancements hw/nvme: Add support for the Virtualization Management command hw/nvme: Initialize capability structures for primary/secondary controllers hw/nvme: Calculate BAR attributes in a function hw/nvme: Remove reg_size variable and update BAR0 size calculation hw/nvme: Make max_ioqpairs and msix_qsize configurable in runtime hw/nvme: Implement the Function Level Reset hw/nvme: Add support for Secondary Controller List hw/nvme: Add support for Primary Controller Capabilities hw/nvme: Add support for SR-IOV Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include/sysemu')
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