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author | Stefan Hajnoczi <stefanha@redhat.com> | 2022-10-20 14:36:12 -0400 |
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committer | Stefan Hajnoczi <stefanha@redhat.com> | 2022-10-20 14:36:12 -0400 |
commit | 0529245488865038344d64fff7ee05864d3d17f6 (patch) | |
tree | c3d6716bc1788169bcdc0222e7addceb489cda7c /include/standard-headers | |
parent | 214a8da23651f2472b296b3293e619fd58d9e212 (diff) | |
parent | 5db899303799e49209016a93289b8694afa1449e (diff) |
Merge tag 'pull-target-arm-20221020' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue:
* Switch to TARGET_TB_PCREL
* More pagetable-walk refactoring preparatory to HAFDBS
* update the cortex-a15 MIDR to latest rev
* hw/char/pl011: fix baud rate calculation
* hw/ide/microdrive: Use device_cold_reset() for self-resets
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# gpg: Signature made Thu 20 Oct 2022 08:20:30 EDT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20221020' of https://git.linaro.org/people/pmaydell/qemu-arm: (24 commits)
hw/ide/microdrive: Use device_cold_reset() for self-resets
target/arm: Enable TARGET_TB_PCREL
target/arm: Introduce gen_pc_plus_diff for aarch32
target/arm: Introduce gen_pc_plus_diff for aarch64
target/arm: Change gen_jmp* to work on displacements
target/arm: Remove gen_exception_internal_insn pc argument
target/arm: Change gen_exception_insn* to work on displacements
target/arm: Change gen_*set_pc_im to gen_*update_pc
target/arm: Change gen_goto_tb to work on displacements
target/arm: Introduce curr_insn_len
target/arm: Use bool consistently for get_phys_addr subroutines
target/arm: Split out get_phys_addr_twostage
target/arm: Use softmmu tlbs for page table walking
target/arm: Move be test for regime into S1TranslateResult
target/arm: Plumb debug into S1Translate
target/arm: Split out S1Translate type
target/arm: Restrict tlb flush from vttbr_write to vmid change
target/arm: Move ARMMMUIdx_Stage2 to a real tlb mmu_idx
target/arm: Add ARMMMUIdx_Phys_{S,NS}
target/arm: Use probe_access_full for BTI
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'include/standard-headers')
0 files changed, 0 insertions, 0 deletions