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authorAlex Richardson <Alexander.Richardson@cl.cam.ac.uk>2020-07-03 17:15:15 +0100
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>2020-07-14 21:49:33 +0200
commitdda97e385b2f0fa84267a497596fe79898d48123 (patch)
treef7677e1504319c4f75a9da2f2f640b932d03213f /include/standard-headers
parent9788e8c9b64e4cebb01c96bab2b0e4c2d4454041 (diff)
target/mips: Fix ADD.S FPU instruction
After merging latest QEMU upstream into our CHERI fork, I noticed that some of the FPU tests in our MIPS baremetal testsuite [*] started failing. It turns out commit 1ace099f2a accidentally changed add.s into a subtract. [*] https://github.com/CTSRD-CHERI/cheritest Fixes: 1ace099f2a ("target/mips: fpu: Demacro ADD.<D|S|PS>") Signed-off-by: Alex Richardson <Alexander.Richardson@cl.cam.ac.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200703161515.25966-1-Alexander.Richardson@cl.cam.ac.uk> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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