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authorAvihai Horon <avihaih@nvidia.com>2023-02-16 16:36:20 +0200
committerAlex Williamson <alex.williamson@redhat.com>2023-02-16 12:13:46 -0700
commit93d7620c251059c08ffb9cf09b27ec6497081b48 (patch)
tree8c2bc7f7b924a3f0b448e501958090399630e1b0 /include/standard-headers/linux/pci_regs.h
parent6dffbe36af79e26a4d23f94a9a1c1201de99c261 (diff)
linux-headers: Update to v6.2-rc8
Update to commit ceaa837f96ad ("Linux 6.2-rc8"). Signed-off-by: Avihai Horon <avihaih@nvidia.com> Link: https://lore.kernel.org/r/20230216143630.25610-2-avihaih@nvidia.com Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Diffstat (limited to 'include/standard-headers/linux/pci_regs.h')
-rw-r--r--include/standard-headers/linux/pci_regs.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/standard-headers/linux/pci_regs.h b/include/standard-headers/linux/pci_regs.h
index 57b8e2ffb1..85ab127881 100644
--- a/include/standard-headers/linux/pci_regs.h
+++ b/include/standard-headers/linux/pci_regs.h
@@ -1058,6 +1058,7 @@
/* Precision Time Measurement */
#define PCI_PTM_CAP 0x04 /* PTM Capability */
#define PCI_PTM_CAP_REQ 0x00000001 /* Requester capable */
+#define PCI_PTM_CAP_RES 0x00000002 /* Responder capable */
#define PCI_PTM_CAP_ROOT 0x00000004 /* Root capable */
#define PCI_PTM_GRANULARITY_MASK 0x0000FF00 /* Clock granularity */
#define PCI_PTM_CTRL 0x08 /* PTM Control */
@@ -1119,6 +1120,7 @@
#define PCI_DOE_STATUS_DATA_OBJECT_READY 0x80000000 /* Data Object Ready */
#define PCI_DOE_WRITE 0x10 /* DOE Write Data Mailbox Register */
#define PCI_DOE_READ 0x14 /* DOE Read Data Mailbox Register */
+#define PCI_DOE_CAP_SIZEOF 0x18 /* Size of DOE register block */
/* DOE Data Object - note not actually registers */
#define PCI_DOE_DATA_OBJECT_HEADER_1_VID 0x0000ffff