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authorPeter Maydell <peter.maydell@linaro.org>2015-09-08 17:38:43 +0100
committerPeter Maydell <peter.maydell@linaro.org>2015-09-08 17:38:43 +0100
commitd5523a13656fb8df902a15a9fd8bd652b85e97e0 (patch)
tree14ea1a5159c468af35c3a85afae1b9cbbd9615d1 /include/qom
parent72889c8a809f4c65796b98d5af6a18c92510ed86 (diff)
hw/intc/arm_gic: Actually set the active bits for active interrupts
Although we were correctly handling interrupts becoming active and then inactive, we weren't actually exposing this to the guest by setting the 'active' flag for the interrupt, so reads of GICD_ICACTIVERn and GICD_ISACTIVERn would generally incorrectly return zeroes. Correct this oversight. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1438089748-5528-6-git-send-email-peter.maydell@linaro.org
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