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authorBin Meng <bin.meng@windriver.com>2020-09-03 18:40:17 +0800
committerAlistair Francis <alistair.francis@wdc.com>2020-09-09 15:54:19 -0700
commit84fcf3c15111de9f0c72efbb6bc0def264555c46 (patch)
tree57567c453d5ea85f06f0c753aefa4fa0d9709eae /include/qemu-common.h
parent406fafd5d0f9a1c6a365ff1733c26a043b1c4877 (diff)
hw/riscv: Move sifive_plic model to hw/intc
This is an effort to clean up the hw/riscv directory. Ideally it should only contain the RISC-V SoC / machine codes plus generic codes. Let's move sifive_plic model to hw/intc directory. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1599129623-68957-7-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'include/qemu-common.h')
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