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authorJonathan Cameron <Jonathan.Cameron@huawei.com>2023-02-27 15:31:27 +0000
committerMichael S. Tsirkin <mst@redhat.com>2023-03-07 19:51:07 -0500
commit84344ee2da1f8a23819c15361298d997d9e69dbf (patch)
treeac01c4fec77128ae7c439f95422f8c1a2cae6410 /include/hw
parent415442a1b4ad31521bbe7ae8bf4ee5d25af3977f (diff)
hw/pci: Add pcie_count_ds_port() and pcie_find_port_first() helpers
These two helpers enable host bridges to operate differently depending on the number of downstream ports, in particular if there is only a single port. Useful for CXL where HDM address decoders are allowed to be implicit in the host bridge if there is only a single root port. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20230227153128.8164-2-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'include/hw')
-rw-r--r--include/hw/pci/pcie_port.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h
index 6c40e3733f..90e6cf45b8 100644
--- a/include/hw/pci/pcie_port.h
+++ b/include/hw/pci/pcie_port.h
@@ -41,6 +41,8 @@ struct PCIEPort {
void pcie_port_init_reg(PCIDevice *d);
PCIDevice *pcie_find_port_by_pn(PCIBus *bus, uint8_t pn);
+PCIDevice *pcie_find_port_first(PCIBus *bus);
+int pcie_count_ds_ports(PCIBus *bus);
#define TYPE_PCIE_SLOT "pcie-slot"
OBJECT_DECLARE_SIMPLE_TYPE(PCIESlot, PCIE_SLOT)