aboutsummaryrefslogtreecommitdiff
path: root/include/hw
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2020-12-11 13:50:35 +0000
committerPeter Maydell <peter.maydell@linaro.org>2020-12-11 13:50:35 +0000
commitb785d25e91718a660546a6550f64b3c543af7754 (patch)
treea69f546d903351e4db899b8f080468ff12fe14e0 /include/hw
parent33744604d768e4281d425baa3ce7128b91319503 (diff)
parent953d0c333e2825656ba1ec5bd1c18bc53485b39c (diff)
Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging
* Fix for NULL segments (Bin Meng) * Support for 32768 CPUs on x86 without IOMMU (David) * PDEP/PEXT fix and testcase (myself) * Remove bios_name and ram_size globals (myself) * qemu_init rationalization (myself) * Update kernel-doc (myself + upstream patches) * Propagate MemTxResult across DMA and PCI functions (Philippe) * Remove master/slave when applicable (Philippe) * WHPX support for in-kernel irqchip (Sunil) # gpg: Signature made Thu 10 Dec 2020 17:21:50 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: (113 commits) scripts: kernel-doc: remove unnecessary change wrt Linux Revert "docs: temporarily disable the kernel-doc extension" scripts: kernel-doc: use :c:union when needed scripts: kernel-doc: split typedef complex regex scripts: kernel-doc: fix typedef parsing Revert "kernel-doc: Handle function typedefs that return pointers" Revert "kernel-doc: Handle function typedefs without asterisks" scripts: kernel-doc: try to use c:function if possible scripts: kernel-doc: fix line number handling scripts: kernel-doc: allow passing desired Sphinx C domain dialect scripts: kernel-doc: don't mangle with parameter list scripts: kernel-doc: fix typedef identification scripts: kernel-doc: reimplement -nofunction argument scripts: kernel-doc: fix troubles with line counts scripts: kernel-doc: use a less pedantic markup for funcs on Sphinx 3.x scripts: kernel-doc: make it more compatible with Sphinx 3.x Revert "kernel-doc: Use c:struct for Sphinx 3.0 and later" Revert "scripts/kerneldoc: For Sphinx 3 use c:macro for macros with arguments" scripts: kernel-doc: add support for typedef enum kernel-doc: add support for ____cacheline_aligned attribute ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw')
-rw-r--r--include/hw/boards.h2
-rw-r--r--include/hw/i386/x86.h3
-rw-r--r--include/hw/misc/max111x.h2
-rw-r--r--include/hw/pci/pci.h50
-rw-r--r--include/hw/qdev-core.h8
-rw-r--r--include/hw/ssi/aspeed_smc.h2
-rw-r--r--include/hw/ssi/ssi.h56
-rw-r--r--include/hw/ssi/xilinx_spips.h2
-rw-r--r--include/hw/stream.h41
9 files changed, 100 insertions, 66 deletions
diff --git a/include/hw/boards.h b/include/hw/boards.h
index f94f4ad5d8..17b1f3f0b9 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -26,6 +26,7 @@ OBJECT_DECLARE_TYPE(MachineState, MachineClass, MACHINE)
extern MachineState *current_machine;
void machine_run_board_init(MachineState *machine);
+bool machine_smp_parse(MachineState *ms, QemuOpts *opts, Error **errp);
bool machine_usb(MachineState *machine);
int machine_phandle_start(MachineState *machine);
bool machine_dump_guest_core(MachineState *machine);
@@ -282,6 +283,7 @@ struct MachineState {
ram_addr_t maxram_size;
uint64_t ram_slots;
const char *boot_order;
+ const char *boot_once;
char *kernel_filename;
char *kernel_cmdline;
char *initrd_filename;
diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h
index 3f9b052cfc..56080bd1fb 100644
--- a/include/hw/i386/x86.h
+++ b/include/hw/i386/x86.h
@@ -102,7 +102,8 @@ void x86_cpu_unplug_request_cb(HotplugHandler *hotplug_dev,
void x86_cpu_unplug_cb(HotplugHandler *hotplug_dev,
DeviceState *dev, Error **errp);
-void x86_bios_rom_init(MemoryRegion *rom_memory, bool isapc_ram_fw);
+void x86_bios_rom_init(MachineState *ms, const char *default_firmware,
+ MemoryRegion *rom_memory, bool isapc_ram_fw);
void x86_load_linux(X86MachineState *x86ms,
FWCfgState *fw_cfg,
diff --git a/include/hw/misc/max111x.h b/include/hw/misc/max111x.h
index 606cf1e0a2..beff59c815 100644
--- a/include/hw/misc/max111x.h
+++ b/include/hw/misc/max111x.h
@@ -33,7 +33,7 @@
* be lowered once it has been asserted.
*/
struct MAX111xState {
- SSISlave parent_obj;
+ SSIPeripheral parent_obj;
qemu_irq interrupt;
/* Values of inputs at system reset (settable by QOM property) */
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 72ce649eee..259f9c992d 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -781,20 +781,58 @@ static inline AddressSpace *pci_get_address_space(PCIDevice *dev)
return &dev->bus_master_as;
}
-static inline int pci_dma_rw(PCIDevice *dev, dma_addr_t addr,
- void *buf, dma_addr_t len, DMADirection dir)
+/**
+ * pci_dma_rw: Read from or write to an address space from PCI device.
+ *
+ * Return a MemTxResult indicating whether the operation succeeded
+ * or failed (eg unassigned memory, device rejected the transaction,
+ * IOMMU fault).
+ *
+ * @dev: #PCIDevice doing the memory access
+ * @addr: address within the #PCIDevice address space
+ * @buf: buffer with the data transferred
+ * @len: the number of bytes to read or write
+ * @dir: indicates the transfer direction
+ */
+static inline MemTxResult pci_dma_rw(PCIDevice *dev, dma_addr_t addr,
+ void *buf, dma_addr_t len,
+ DMADirection dir)
{
return dma_memory_rw(pci_get_address_space(dev), addr, buf, len, dir);
}
-static inline int pci_dma_read(PCIDevice *dev, dma_addr_t addr,
- void *buf, dma_addr_t len)
+/**
+ * pci_dma_read: Read from an address space from PCI device.
+ *
+ * Return a MemTxResult indicating whether the operation succeeded
+ * or failed (eg unassigned memory, device rejected the transaction,
+ * IOMMU fault). Called within RCU critical section.
+ *
+ * @dev: #PCIDevice doing the memory access
+ * @addr: address within the #PCIDevice address space
+ * @buf: buffer with the data transferred
+ * @len: length of the data transferred
+ */
+static inline MemTxResult pci_dma_read(PCIDevice *dev, dma_addr_t addr,
+ void *buf, dma_addr_t len)
{
return pci_dma_rw(dev, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
}
-static inline int pci_dma_write(PCIDevice *dev, dma_addr_t addr,
- const void *buf, dma_addr_t len)
+/**
+ * pci_dma_write: Write to address space from PCI device.
+ *
+ * Return a MemTxResult indicating whether the operation succeeded
+ * or failed (eg unassigned memory, device rejected the transaction,
+ * IOMMU fault).
+ *
+ * @dev: #PCIDevice doing the memory access
+ * @addr: address within the #PCIDevice address space
+ * @buf: buffer with the data transferred
+ * @len: the number of bytes to write
+ */
+static inline MemTxResult pci_dma_write(PCIDevice *dev, dma_addr_t addr,
+ const void *buf, dma_addr_t len)
{
return pci_dma_rw(dev, addr, (void *) buf, len, DMA_DIRECTION_FROM_DEVICE);
}
diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h
index 6ac86db44e..9fbb22a48d 100644
--- a/include/hw/qdev-core.h
+++ b/include/hw/qdev-core.h
@@ -788,14 +788,6 @@ char *qdev_get_fw_dev_path(DeviceState *dev);
char *qdev_get_own_fw_dev_path_from_handler(BusState *bus, DeviceState *dev);
/**
- * @qdev_machine_init
- *
- * Initialize platform devices before machine init. This is a hack until full
- * support for composition is added.
- */
-void qdev_machine_init(void);
-
-/**
* device_legacy_reset:
*
* Reset a single device (by calling the reset method).
diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/ssi/aspeed_smc.h
index 3dd354b52e..16c03fe64f 100644
--- a/include/hw/ssi/aspeed_smc.h
+++ b/include/hw/ssi/aspeed_smc.h
@@ -43,7 +43,7 @@ typedef struct AspeedSMCController {
uint8_t r_timings;
uint8_t nregs_timings;
uint8_t conf_enable_w0;
- uint8_t max_slaves;
+ uint8_t max_peripherals;
const AspeedSegments *segments;
hwaddr flash_window_base;
uint32_t flash_window_size;
diff --git a/include/hw/ssi/ssi.h b/include/hw/ssi/ssi.h
index fe3028c39d..f411858ab0 100644
--- a/include/hw/ssi/ssi.h
+++ b/include/hw/ssi/ssi.h
@@ -1,12 +1,14 @@
/* QEMU Synchronous Serial Interface support. */
-/* In principle SSI is a point-point interface. As such the qemu
- implementation has a single slave device on a "bus".
- However it is fairly common for boards to have multiple slaves
- connected to a single master, and select devices with an external
- chip select. This is implemented in qemu by having an explicit mux device.
- It is assumed that master and slave are both using the same transfer width.
- */
+/*
+ * In principle SSI is a point-point interface. As such the qemu
+ * implementation has a single peripheral on a "bus".
+ * However it is fairly common for boards to have multiple peripherals
+ * connected to a single master, and select devices with an external
+ * chip select. This is implemented in qemu by having an explicit mux device.
+ * It is assumed that master and peripheral are both using the same transfer
+ * width.
+ */
#ifndef QEMU_SSI_H
#define QEMU_SSI_H
@@ -16,9 +18,9 @@
typedef enum SSICSMode SSICSMode;
-#define TYPE_SSI_SLAVE "ssi-slave"
-OBJECT_DECLARE_TYPE(SSISlave, SSISlaveClass,
- SSI_SLAVE)
+#define TYPE_SSI_PERIPHERAL "ssi-peripheral"
+OBJECT_DECLARE_TYPE(SSIPeripheral, SSIPeripheralClass,
+ SSI_PERIPHERAL)
#define SSI_GPIO_CS "ssi-gpio-cs"
@@ -28,21 +30,21 @@ enum SSICSMode {
SSI_CS_HIGH,
};
-/* Slave devices. */
-struct SSISlaveClass {
+/* Peripherals. */
+struct SSIPeripheralClass {
DeviceClass parent_class;
- void (*realize)(SSISlave *dev, Error **errp);
+ void (*realize)(SSIPeripheral *dev, Error **errp);
/* if you have standard or no CS behaviour, just override transfer.
* This is called when the device cs is active (true by default).
*/
- uint32_t (*transfer)(SSISlave *dev, uint32_t val);
+ uint32_t (*transfer)(SSIPeripheral *dev, uint32_t val);
/* called when the CS line changes. Optional, devices only need to implement
* this if they have side effects associated with the cs line (beyond
* tristating the txrx lines).
*/
- int (*set_cs)(SSISlave *dev, bool select);
+ int (*set_cs)(SSIPeripheral *dev, bool select);
/* define whether or not CS exists and is active low/high */
SSICSMode cs_polarity;
@@ -51,30 +53,30 @@ struct SSISlaveClass {
* cs_polarity are unused if this is overwritten. Transfer_raw will
* always be called for the device for every txrx access to the parent bus
*/
- uint32_t (*transfer_raw)(SSISlave *dev, uint32_t val);
+ uint32_t (*transfer_raw)(SSIPeripheral *dev, uint32_t val);
};
-struct SSISlave {
+struct SSIPeripheral {
DeviceState parent_obj;
/* Chip select state */
bool cs;
};
-extern const VMStateDescription vmstate_ssi_slave;
+extern const VMStateDescription vmstate_ssi_peripheral;
-#define VMSTATE_SSI_SLAVE(_field, _state) { \
+#define VMSTATE_SSI_PERIPHERAL(_field, _state) { \
.name = (stringify(_field)), \
- .size = sizeof(SSISlave), \
- .vmsd = &vmstate_ssi_slave, \
+ .size = sizeof(SSIPeripheral), \
+ .vmsd = &vmstate_ssi_peripheral, \
.flags = VMS_STRUCT, \
- .offset = vmstate_offset_value(_state, _field, SSISlave), \
+ .offset = vmstate_offset_value(_state, _field, SSIPeripheral), \
}
-DeviceState *ssi_create_slave(SSIBus *bus, const char *name);
+DeviceState *ssi_create_peripheral(SSIBus *bus, const char *name);
/**
- * ssi_realize_and_unref: realize and unref an SSI slave device
- * @dev: SSI slave device to realize
+ * ssi_realize_and_unref: realize and unref an SSI peripheral
+ * @dev: SSI peripheral to realize
* @bus: SSI bus to put it on
* @errp: error pointer
*
@@ -85,10 +87,10 @@ DeviceState *ssi_create_slave(SSIBus *bus, const char *name);
* This function is useful if you have created @dev via qdev_new()
* (which takes a reference to the device it returns to you), so that
* you can set properties on it before realizing it. If you don't need
- * to set properties then ssi_create_slave() is probably better (as it
+ * to set properties then ssi_create_peripheral() is probably better (as it
* does the create, init and realize in one step).
*
- * If you are embedding the SSI slave into another QOM device and
+ * If you are embedding the SSI peripheral into another QOM device and
* initialized it via some variant on object_initialize_child() then
* do not use this function, because that family of functions arrange
* for the only reference to the child device to be held by the parent
diff --git a/include/hw/ssi/xilinx_spips.h b/include/hw/ssi/xilinx_spips.h
index b96de21b34..3eae73480e 100644
--- a/include/hw/ssi/xilinx_spips.h
+++ b/include/hw/ssi/xilinx_spips.h
@@ -99,7 +99,7 @@ typedef struct XilinxQSPIPS XilinxQSPIPS;
struct XlnxZynqMPQSPIPS {
XilinxQSPIPS parent_obj;
- StreamSlave *dma;
+ StreamSink *dma;
int gqspi_irqline;
uint32_t regs[XLNX_ZYNQMP_SPIPS_R_MAX];
diff --git a/include/hw/stream.h b/include/hw/stream.h
index e39d5a5b55..f166facb09 100644
--- a/include/hw/stream.h
+++ b/include/hw/stream.h
@@ -3,51 +3,50 @@
#include "qom/object.h"
-/* stream slave. Used until qdev provides a generic way. */
-#define TYPE_STREAM_SLAVE "stream-slave"
+#define TYPE_STREAM_SINK "stream-sink"
-typedef struct StreamSlaveClass StreamSlaveClass;
-DECLARE_CLASS_CHECKERS(StreamSlaveClass, STREAM_SLAVE,
- TYPE_STREAM_SLAVE)
-#define STREAM_SLAVE(obj) \
- INTERFACE_CHECK(StreamSlave, (obj), TYPE_STREAM_SLAVE)
+typedef struct StreamSinkClass StreamSinkClass;
+DECLARE_CLASS_CHECKERS(StreamSinkClass, STREAM_SINK,
+ TYPE_STREAM_SINK)
+#define STREAM_SINK(obj) \
+ INTERFACE_CHECK(StreamSink, (obj), TYPE_STREAM_SINK)
-typedef struct StreamSlave StreamSlave;
+typedef struct StreamSink StreamSink;
typedef void (*StreamCanPushNotifyFn)(void *opaque);
-struct StreamSlaveClass {
+struct StreamSinkClass {
InterfaceClass parent;
/**
- * can push - determine if a stream slave is capable of accepting at least
+ * can push - determine if a stream sink is capable of accepting at least
* one byte of data. Returns false if cannot accept. If not implemented, the
- * slave is assumed to always be capable of receiving.
- * @notify: Optional callback that the slave will call when the slave is
+ * sink is assumed to always be capable of receiving.
+ * @notify: Optional callback that the sink will call when the sink is
* capable of receiving again. Only called if false is returned.
* @notify_opaque: opaque data to pass to notify call.
*/
- bool (*can_push)(StreamSlave *obj, StreamCanPushNotifyFn notify,
+ bool (*can_push)(StreamSink *obj, StreamCanPushNotifyFn notify,
void *notify_opaque);
/**
- * push - push data to a Stream slave. The number of bytes pushed is
- * returned. If the slave short returns, the master must wait before trying
- * again, the slave may continue to just return 0 waiting for the vm time to
+ * push - push data to a Stream sink. The number of bytes pushed is
+ * returned. If the sink short returns, the master must wait before trying
+ * again, the sink may continue to just return 0 waiting for the vm time to
* advance. The can_push() function can be used to trap the point in time
- * where the slave is ready to receive again, otherwise polling on a QEMU
+ * where the sink is ready to receive again, otherwise polling on a QEMU
* timer will work.
- * @obj: Stream slave to push to
+ * @obj: Stream sink to push to
* @buf: Data to write
* @len: Maximum number of bytes to write
* @eop: End of packet flag
*/
- size_t (*push)(StreamSlave *obj, unsigned char *buf, size_t len, bool eop);
+ size_t (*push)(StreamSink *obj, unsigned char *buf, size_t len, bool eop);
};
size_t
-stream_push(StreamSlave *sink, uint8_t *buf, size_t len, bool eop);
+stream_push(StreamSink *sink, uint8_t *buf, size_t len, bool eop);
bool
-stream_can_push(StreamSlave *sink, StreamCanPushNotifyFn notify,
+stream_can_push(StreamSink *sink, StreamCanPushNotifyFn notify,
void *notify_opaque);