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authorPeter Maydell <peter.maydell@linaro.org>2020-01-10 16:15:04 +0000
committerPeter Maydell <peter.maydell@linaro.org>2020-01-10 16:15:04 +0000
commitdc65a5bdc9fa543690a775b50d4ffbeb22c56d6d (patch)
tree35501a50d656d2ec85252f6ebe7fa151c502b932 /include/hw
parentf38a71b01f839c7b65ea73ddd507903cb9489ed6 (diff)
parentfc2527fb024abf92719952c939d751739455bd6b (diff)
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-5.0-20200108' into staging
ppc patch queue 2020-01-08 Here's another pull request for qemu-5.0 of ppc related changes. Highlights are: * First parts of support for POWER Secure VMs * Rework to clean up how we pass context information to the various components of the pnv machine (reduces usage of qdev_get_machine()) * Assorted cleanups and bugfixes # gpg: Signature made Wed 08 Jan 2020 05:22:08 GMT # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-5.0-20200108: (26 commits) ppc/pnv: fix check on return value of blk_getlength() ppc/pnv: check return value of blk_pwrite() pnv/psi: Consolidate some duplicated code in pnv_psi_realize() pnv/psi: Add device reset hook pnv/xive: Deduce the PnvXive pointer from XiveTCTX::xptr spapr/xive: Deduce the SpaprXive pointer from XiveTCTX::xptr xive: Add a "presenter" link property to the TCTX object ppc/pnv: Add a "pnor" const link property to the BMC internal simulator ppc/pnv: Add an "nr-threads" property to the base chip class xive: Use the XIVE fabric link under the XIVE router spapr, pnv, xive: Add a "xive-fabric" link to the XIVE router pnv/xive: Use device_class_set_parent_realize() ppc/pnv: Introduce a "xics" property under the POWER8 chip ppc/pnv: Introduce a "xics" property alias under the PSI model spapr/xive: remove redundant check in spapr_match_nvt() ppc/pnv: Drop "num-chips" machine property ppc440_bamboo.c: remove label from bamboo_load_device_tree() spapr.c: remove 'out' label in spapr_dt_cas_updates() ppc/spapr: Don't call KVM_SVM_OFF ioctl on TCG spapr/xive: Use device_class_set_parent_realize() ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw')
-rw-r--r--include/hw/misc/mos6522.h1
-rw-r--r--include/hw/ppc/pnv.h7
-rw-r--r--include/hw/ppc/pnv_pnor.h2
-rw-r--r--include/hw/ppc/pnv_xive.h10
-rw-r--r--include/hw/ppc/spapr_xive.h10
-rw-r--r--include/hw/ppc/xive.h13
6 files changed, 33 insertions, 10 deletions
diff --git a/include/hw/misc/mos6522.h b/include/hw/misc/mos6522.h
index 493c907537..97384c6e02 100644
--- a/include/hw/misc/mos6522.h
+++ b/include/hw/misc/mos6522.h
@@ -115,7 +115,6 @@ typedef struct MOS6522State {
uint8_t pcr;
uint8_t ifr;
uint8_t ier;
- uint8_t anh;
MOS6522Timer timers[2];
uint64_t frequency;
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index f78fd0dd96..d65dd32036 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -48,6 +48,7 @@ typedef struct PnvChip {
uint64_t ram_size;
uint32_t nr_cores;
+ uint32_t nr_threads;
uint64_t cores_mask;
PnvCore **cores;
@@ -72,6 +73,8 @@ typedef struct Pnv8Chip {
Pnv8Psi psi;
PnvOCC occ;
PnvHomer homer;
+
+ XICSFabric *xics;
} Pnv8Chip;
#define TYPE_PNV9_CHIP "pnv9-chip"
@@ -216,8 +219,6 @@ struct PnvMachineState {
PnvPnor *pnor;
};
-PnvChip *pnv_get_chip(uint32_t chip_id);
-
#define PNV_FDT_ADDR 0x01000000
#define PNV_TIMEBASE_FREQ 512000000ULL
@@ -226,7 +227,7 @@ PnvChip *pnv_get_chip(uint32_t chip_id);
*/
void pnv_dt_bmc_sensors(IPMIBmc *bmc, void *fdt);
void pnv_bmc_powerdown(IPMIBmc *bmc);
-IPMIBmc *pnv_bmc_create(void);
+IPMIBmc *pnv_bmc_create(PnvPnor *pnor);
/*
* POWER8 MMIO base addresses
diff --git a/include/hw/ppc/pnv_pnor.h b/include/hw/ppc/pnv_pnor.h
index c3dd28643c..4f96abdfb4 100644
--- a/include/hw/ppc/pnv_pnor.h
+++ b/include/hw/ppc/pnv_pnor.h
@@ -23,7 +23,7 @@ typedef struct PnvPnor {
BlockBackend *blk;
uint8_t *storage;
- uint32_t size;
+ int64_t size;
MemoryRegion mmio;
} PnvPnor;
diff --git a/include/hw/ppc/pnv_xive.h b/include/hw/ppc/pnv_xive.h
index f4c7caad40..76cf16f644 100644
--- a/include/hw/ppc/pnv_xive.h
+++ b/include/hw/ppc/pnv_xive.h
@@ -16,6 +16,10 @@ struct PnvChip;
#define TYPE_PNV_XIVE "pnv-xive"
#define PNV_XIVE(obj) OBJECT_CHECK(PnvXive, (obj), TYPE_PNV_XIVE)
+#define PNV_XIVE_CLASS(klass) \
+ OBJECT_CLASS_CHECK(PnvXiveClass, (klass), TYPE_PNV_XIVE)
+#define PNV_XIVE_GET_CLASS(obj) \
+ OBJECT_GET_CLASS(PnvXiveClass, (obj), TYPE_PNV_XIVE)
#define XIVE_BLOCK_MAX 16
@@ -85,6 +89,12 @@ typedef struct PnvXive {
uint64_t edt[XIVE_TABLE_EDT_MAX];
} PnvXive;
+typedef struct PnvXiveClass {
+ XiveRouterClass parent_class;
+
+ DeviceRealize parent_realize;
+} PnvXiveClass;
+
void pnv_xive_pic_print_info(PnvXive *xive, Monitor *mon);
#endif /* PPC_PNV_XIVE_H */
diff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h
index 3a103c224d..93d09d68de 100644
--- a/include/hw/ppc/spapr_xive.h
+++ b/include/hw/ppc/spapr_xive.h
@@ -15,6 +15,10 @@
#define TYPE_SPAPR_XIVE "spapr-xive"
#define SPAPR_XIVE(obj) OBJECT_CHECK(SpaprXive, (obj), TYPE_SPAPR_XIVE)
+#define SPAPR_XIVE_CLASS(klass) \
+ OBJECT_CLASS_CHECK(SpaprXiveClass, (klass), TYPE_SPAPR_XIVE)
+#define SPAPR_XIVE_GET_CLASS(obj) \
+ OBJECT_GET_CLASS(SpaprXiveClass, (obj), TYPE_SPAPR_XIVE)
typedef struct SpaprXive {
XiveRouter parent;
@@ -47,6 +51,12 @@ typedef struct SpaprXive {
VMChangeStateEntry *change;
} SpaprXive;
+typedef struct SpaprXiveClass {
+ XiveRouterClass parent;
+
+ DeviceRealize parent_realize;
+} SpaprXiveClass;
+
/*
* The sPAPR machine has a unique XIVE IC device. Assign a fixed value
* to the controller block id value. It can nevertheless be changed
diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h
index 1b7b89098f..705cf48176 100644
--- a/include/hw/ppc/xive.h
+++ b/include/hw/ppc/xive.h
@@ -311,6 +311,8 @@ void xive_source_set_irq(void *opaque, int srcno, int val);
#define XIVE_TM_RING_COUNT 4
#define XIVE_TM_RING_SIZE 0x10
+typedef struct XivePresenter XivePresenter;
+
typedef struct XiveTCTX {
DeviceState parent_obj;
@@ -319,14 +321,19 @@ typedef struct XiveTCTX {
qemu_irq os_output;
uint8_t regs[XIVE_TM_RING_COUNT * XIVE_TM_RING_SIZE];
+
+ XivePresenter *xptr;
} XiveTCTX;
/*
* XIVE Router
*/
+typedef struct XiveFabric XiveFabric;
typedef struct XiveRouter {
SysBusDevice parent;
+
+ XiveFabric *xfb;
} XiveRouter;
#define TYPE_XIVE_ROUTER "xive-router"
@@ -375,8 +382,6 @@ typedef struct XiveTCTXMatch {
uint8_t ring;
} XiveTCTXMatch;
-typedef struct XivePresenter XivePresenter;
-
#define TYPE_XIVE_PRESENTER "xive-presenter"
#define XIVE_PRESENTER(obj) \
INTERFACE_CHECK(XivePresenter, (obj), TYPE_XIVE_PRESENTER)
@@ -402,8 +407,6 @@ int xive_presenter_tctx_match(XivePresenter *xptr, XiveTCTX *tctx,
* XIVE Fabric (Interface between Interrupt Controller and Machine)
*/
-typedef struct XiveFabric XiveFabric;
-
#define TYPE_XIVE_FABRIC "xive-fabric"
#define XIVE_FABRIC(obj) \
INTERFACE_CHECK(XiveFabric, (obj), TYPE_XIVE_FABRIC)
@@ -466,7 +469,7 @@ uint64_t xive_tctx_tm_read(XivePresenter *xptr, XiveTCTX *tctx, hwaddr offset,
unsigned size);
void xive_tctx_pic_print_info(XiveTCTX *tctx, Monitor *mon);
-Object *xive_tctx_create(Object *cpu, XiveRouter *xrtr, Error **errp);
+Object *xive_tctx_create(Object *cpu, XivePresenter *xptr, Error **errp);
void xive_tctx_reset(XiveTCTX *tctx);
void xive_tctx_destroy(XiveTCTX *tctx);
void xive_tctx_ipb_update(XiveTCTX *tctx, uint8_t ring, uint8_t ipb);
generated by cgit v1.2.3 (git 2.26.2) at 2025-03-18 02:34:25 +0000