diff options
| author | Prasad Singamsetty <prasad.singamsetty@oracle.com> | 2017-11-14 18:13:50 -0500 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2018-01-18 21:52:38 +0200 |
| commit | 37f51384ae05bd50f83308339dbffa3e78404874 (patch) | |
| tree | b6615d4eafdb37c0a2c1ac0d4e23dc60cf986518 /include/hw | |
| parent | 92e5d85e8345a22e87eda940ffe0f6422eb45360 (diff) | |
intel-iommu: Extend address width to 48 bits
The current implementation of Intel IOMMU code only supports 39 bits
iova address width. This patch provides a new parameter (x-aw-bits)
for intel-iommu to extend its address width to 48 bits but keeping the
default the same (39 bits). The reason for not changing the default
is to avoid potential compatibility problems with live migration of
intel-iommu enabled QEMU guest. The only valid values for 'x-aw-bits'
parameter are 39 and 48.
After enabling larger address width (48), we should be able to map
larger iova addresses in the guest. For example, a QEMU guest that
is configured with large memory ( >=1TB ). To check whether 48 bits
aw is enabled, we can grep in the guest dmesg output with line:
"DMAR: Host address width 48".
Signed-off-by: Prasad Singamsetty <prasad.singamsety@oracle.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'include/hw')
| -rw-r--r-- | include/hw/i386/intel_iommu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h index 372b06df45..45ec8919b6 100644 --- a/include/hw/i386/intel_iommu.h +++ b/include/hw/i386/intel_iommu.h @@ -304,6 +304,7 @@ struct IntelIOMMUState { bool intr_eime; /* Extended interrupt mode enabled */ OnOffAuto intr_eim; /* Toggle for EIM cabability */ bool buggy_eim; /* Force buggy EIM unless eim=off */ + uint8_t aw_bits; /* Host/IOVA address width (in bits) */ }; /* Find the VTD Address space associated with the given bus pointer, |