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authorPeter Maydell <peter.maydell@linaro.org>2017-02-02 11:03:37 +0000
committerPeter Maydell <peter.maydell@linaro.org>2017-02-02 11:03:37 +0000
commite905587b752a700644235fbbf6af6d21f0632616 (patch)
treec35ad97aebd1bd0fe114e87fad3cb9a9c191a071 /include/hw
parent2d6752d38d8acda6aae674a72b72be05482a58eb (diff)
parent1b28762a333bd238611103e9ed2348d7af93b0db (diff)
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
virtio, vhost, pci: fixes, features generic pci root port support disable shpc by default safer version of ARRAY_SIZE and QEMU_BUILD_BUG_ON fixes and cleanups all over the place Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Wed 01 Feb 2017 01:38:34 GMT # gpg: using RSA key 0x281F0DB8D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: (22 commits) arm: add trailing ; after MISMATCH_CHECK arm: better stub version for MISMATCH_CHECK hw/pci: disable pci-bridge's shpc by default vhost-user: delete chardev on cleanup vhost: skip ROM sections virtio: make virtio_should_notify static pci: Convert msix_init() to Error and fix callers hcd-xhci: check & correct param before using it msix: Follow CODING_STYLE hw/i386: check if nvdimm is enabled before plugging hw/pcie: Introduce Generic PCI Express Root Port hw/ioh3420: derive from PCI Express Root Port base class hw/pcie: Introduce a base class for PCI Express Root Ports intel_iommu: fix and simplify size calculation in process_device_iotlb_desc() pci: mark ROMs read-only ARRAY_SIZE: check that argument is an array compiler: expression version of QEMU_BUILD_BUG_ON compiler: rework BUG_ON using a struct QEMU_BUILD_BUG_ON: use __COUNTER__ ppc: switch to constants within BUILD_BUG_ON ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw')
-rw-r--r--include/hw/compat.h4
-rw-r--r--include/hw/pci/msix.h5
-rw-r--r--include/hw/pci/pci.h1
-rw-r--r--include/hw/pci/pcie_port.h19
-rw-r--r--include/hw/virtio/virtio.h1
5 files changed, 27 insertions, 3 deletions
diff --git a/include/hw/compat.h b/include/hw/compat.h
index ee0dd1b5df..b7db43803c 100644
--- a/include/hw/compat.h
+++ b/include/hw/compat.h
@@ -14,6 +14,10 @@
.driver = "pflash_cfi01",\
.property = "old-multiple-chip-handling",\
.value = "on",\
+ },{\
+ .driver = "pci-bridge",\
+ .property = "shpc",\
+ .value = "on",\
},
#define HW_COMPAT_2_7 \
diff --git a/include/hw/pci/msix.h b/include/hw/pci/msix.h
index 048a29dd2f..1f27658d35 100644
--- a/include/hw/pci/msix.h
+++ b/include/hw/pci/msix.h
@@ -9,9 +9,10 @@ MSIMessage msix_get_message(PCIDevice *dev, unsigned int vector);
int msix_init(PCIDevice *dev, unsigned short nentries,
MemoryRegion *table_bar, uint8_t table_bar_nr,
unsigned table_offset, MemoryRegion *pba_bar,
- uint8_t pba_bar_nr, unsigned pba_offset, uint8_t cap_pos);
+ uint8_t pba_bar_nr, unsigned pba_offset, uint8_t cap_pos,
+ Error **errp);
int msix_init_exclusive_bar(PCIDevice *dev, unsigned short nentries,
- uint8_t bar_nr);
+ uint8_t bar_nr, Error **errp);
void msix_write_config(PCIDevice *dev, uint32_t address, uint32_t val, int len);
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 772692f1b2..cbc1fdfb5b 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -96,6 +96,7 @@
#define PCI_DEVICE_ID_REDHAT_PXB 0x0009
#define PCI_DEVICE_ID_REDHAT_BRIDGE_SEAT 0x000a
#define PCI_DEVICE_ID_REDHAT_PXB_PCIE 0x000b
+#define PCI_DEVICE_ID_REDHAT_PCIE_RP 0x000c
#define PCI_DEVICE_ID_REDHAT_QXL 0x0100
#define FMT_PCIBUS PRIx64
diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h
index f7b64db00c..13332668e8 100644
--- a/include/hw/pci/pcie_port.h
+++ b/include/hw/pci/pcie_port.h
@@ -57,4 +57,23 @@ PCIESlot *pcie_chassis_find_slot(uint8_t chassis, uint16_t slot);
int pcie_chassis_add_slot(struct PCIESlot *slot);
void pcie_chassis_del_slot(PCIESlot *s);
+#define TYPE_PCIE_ROOT_PORT "pcie-root-port-base"
+#define PCIE_ROOT_PORT_CLASS(klass) \
+ OBJECT_CLASS_CHECK(PCIERootPortClass, (klass), TYPE_PCIE_ROOT_PORT)
+#define PCIE_ROOT_PORT_GET_CLASS(obj) \
+ OBJECT_GET_CLASS(PCIERootPortClass, (obj), TYPE_PCIE_ROOT_PORT)
+
+typedef struct PCIERootPortClass {
+ PCIDeviceClass parent_class;
+
+ uint8_t (*aer_vector)(const PCIDevice *dev);
+ int (*interrupts_init)(PCIDevice *dev, Error **errp);
+ void (*interrupts_uninit)(PCIDevice *dev);
+
+ int exp_offset;
+ int aer_offset;
+ int ssvid_offset;
+ int ssid;
+} PCIERootPortClass;
+
#endif /* QEMU_PCIE_PORT_H */
diff --git a/include/hw/virtio/virtio.h b/include/hw/virtio/virtio.h
index 6523bacd2f..525da24222 100644
--- a/include/hw/virtio/virtio.h
+++ b/include/hw/virtio/virtio.h
@@ -182,7 +182,6 @@ void virtqueue_get_avail_bytes(VirtQueue *vq, unsigned int *in_bytes,
unsigned int *out_bytes,
unsigned max_in_bytes, unsigned max_out_bytes);
-bool virtio_should_notify(VirtIODevice *vdev, VirtQueue *vq);
void virtio_notify_irqfd(VirtIODevice *vdev, VirtQueue *vq);
void virtio_notify(VirtIODevice *vdev, VirtQueue *vq);