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authorAnthony Liguori <aliguori@us.ibm.com>2013-04-08 13:12:32 -0500
committerAnthony Liguori <aliguori@us.ibm.com>2013-04-08 13:12:33 -0500
commit47b5264eb3e1cd2825e48d28fd0d1b239ed53974 (patch)
tree3efa22775b82624df0cb10486ea05526613b9ea6 /include/hw/timer/i8254_internal.h
parent1f8010f0790b53e5a75dbbd3e14868759ac00e6c (diff)
parent47b43a1f414c5b3eb9eb7502d0b0be0d134259ba (diff)
Merge remote-tracking branch 'bonzini/hw-dirs' into staging
# By Paolo Bonzini # Via Paolo Bonzini * bonzini/hw-dirs: (35 commits) hw: move private headers to hw/ subdirectories. MAINTAINERS: update for source code movement hw: move last file to hw/arm/ hw: move hw/kvm/ to hw/i386/kvm hw: move ARM CPU cores to hw/cpu/, configure with default-configs/ hw: move other devices to hw/misc/, configure with default-configs/ hw: move NVRAM interfaces to hw/nvram/, configure with default-configs/ hw: move GPIO interfaces to hw/gpio/, configure with default-configs/ hw: move interrupt controllers to hw/intc/, configure with default-configs/ hw: move DMA controllers to hw/dma/, configure with default-configs/ hw: move VFIO and ivshmem to hw/misc/ hw: move PCI bridges to hw/pci-* or hw/ARCH hw: move SD/MMC devices to hw/sd/, configure with default-configs/ hw: move timer devices to hw/timer/, configure with default-configs/ hw: move ISA bridges and devices to hw/isa/, configure with default-configs/ hw: move char devices to hw/char/, configure via default-configs/ hw: move more files to hw/xen/ hw: move SCSI controllers to hw/scsi/, configure via default-configs/ hw: move SSI controllers to hw/ssi/, configure via default-configs/ hw: move I2C controllers to hw/i2c/, configure via default-configs/ ... Message-id: 1365442249-18259-1-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'include/hw/timer/i8254_internal.h')
-rw-r--r--include/hw/timer/i8254_internal.h85
1 files changed, 85 insertions, 0 deletions
diff --git a/include/hw/timer/i8254_internal.h b/include/hw/timer/i8254_internal.h
new file mode 100644
index 0000000000..e0cff0cf5a
--- /dev/null
+++ b/include/hw/timer/i8254_internal.h
@@ -0,0 +1,85 @@
+/*
+ * QEMU 8253/8254 - internal interfaces
+ *
+ * Copyright (c) 2011 Jan Kiszka, Siemens AG
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef QEMU_I8254_INTERNAL_H
+#define QEMU_I8254_INTERNAL_H
+
+#include "hw/hw.h"
+#include "hw/i386/pc.h"
+#include "hw/isa/isa.h"
+
+typedef struct PITChannelState {
+ int count; /* can be 65536 */
+ uint16_t latched_count;
+ uint8_t count_latched;
+ uint8_t status_latched;
+ uint8_t status;
+ uint8_t read_state;
+ uint8_t write_state;
+ uint8_t write_latch;
+ uint8_t rw_mode;
+ uint8_t mode;
+ uint8_t bcd; /* not supported */
+ uint8_t gate; /* timer start */
+ int64_t count_load_time;
+ /* irq handling */
+ int64_t next_transition_time;
+ QEMUTimer *irq_timer;
+ qemu_irq irq;
+ uint32_t irq_disabled;
+} PITChannelState;
+
+typedef struct PITCommonState {
+ ISADevice dev;
+ MemoryRegion ioports;
+ uint32_t iobase;
+ PITChannelState channels[3];
+} PITCommonState;
+
+#define TYPE_PIT_COMMON "pit-common"
+#define PIT_COMMON(obj) \
+ OBJECT_CHECK(PITCommonState, (obj), TYPE_PIT_COMMON)
+#define PIT_COMMON_CLASS(klass) \
+ OBJECT_CLASS_CHECK(PITCommonClass, (klass), TYPE_PIT_COMMON)
+#define PIT_COMMON_GET_CLASS(obj) \
+ OBJECT_GET_CLASS(PITCommonClass, (obj), TYPE_PIT_COMMON)
+
+typedef struct PITCommonClass {
+ ISADeviceClass parent_class;
+
+ int (*init)(PITCommonState *s);
+ void (*set_channel_gate)(PITCommonState *s, PITChannelState *sc, int val);
+ void (*get_channel_info)(PITCommonState *s, PITChannelState *sc,
+ PITChannelInfo *info);
+ void (*pre_save)(PITCommonState *s);
+ void (*post_load)(PITCommonState *s);
+} PITCommonClass;
+
+int pit_get_out(PITChannelState *s, int64_t current_time);
+int64_t pit_get_next_transition_time(PITChannelState *s, int64_t current_time);
+void pit_get_channel_info_common(PITCommonState *s, PITChannelState *sc,
+ PITChannelInfo *info);
+void pit_reset_common(PITCommonState *s);
+
+#endif /* !QEMU_I8254_INTERNAL_H */