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authorMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>2022-05-28 10:02:11 +0100
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>2022-06-11 11:44:06 +0200
commit5b07f441022c1114073c05cdffd1bb829cbc31c5 (patch)
treeb0357dacd6b01027f966e2da63674ba011574dcb /include/hw/southbridge
parent3f0efcac43707c02525b5bbaf996c6bf80e2f706 (diff)
hw/acpi/piix4: change smm_enabled from int to bool
This is in preparation for conversion to a qdev property. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20220528091934.15520-3-mark.cave-ayland@ilande.co.uk> [PMD: Change simm_enabled from int to bool, suggested by Ani Sinha] Reviewed-by: Bernhard Beschow <shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'include/hw/southbridge')
-rw-r--r--include/hw/southbridge/piix.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h
index f63f83e5c6..ff8d96ae8c 100644
--- a/include/hw/southbridge/piix.h
+++ b/include/hw/southbridge/piix.h
@@ -19,7 +19,7 @@
I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
qemu_irq sci_irq, qemu_irq smi_irq,
- int smm_enabled, DeviceState **piix4_pm);
+ bool smm_enabled, DeviceState **piix4_pm);
/* PIRQRC[A:D]: PIRQx Route Control Registers */
#define PIIX_PIRQCA 0x60