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authorCédric Le Goater <clg@kaod.org>2022-03-02 06:51:38 +0100
committerCédric Le Goater <clg@kaod.org>2022-03-02 06:51:38 +0100
commit09a67f3d0e2cb9e66b2ba438de09789527ccb9fe (patch)
treeae3c699b832c4333b11f5d3228ea4be3db256c47 /include/hw/ppc
parentf8a233dedf2560d7d592dab347ddf2a58e8a98db (diff)
ppc/xive2: Introduce a presenter matching routine
The VP space is larger in XIVE2 (P10), 24 bits instead of 19bits on XIVE (P9), and the CAM line can use a 7bits or 8bits thread id. For now, we only use 7bits thread ids, same as P9, but because of the change of the size of the VP space, the CAM matching routine is different between P9 and P10. It is easier to duplicate the whole routine than to add extra handlers in xive_presenter_tctx_match() used for P9. We might come with a better solution later on, after we have added some more support for the XIVE2 controller. Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'include/hw/ppc')
-rw-r--r--include/hw/ppc/xive2.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/include/hw/ppc/xive2.h b/include/hw/ppc/xive2.h
index 69b2117e65..0897ddbd48 100644
--- a/include/hw/ppc/xive2.h
+++ b/include/hw/ppc/xive2.h
@@ -56,6 +56,15 @@ int xive2_router_write_nvp(Xive2Router *xrtr, uint8_t nvp_blk, uint32_t nvp_idx,
void xive2_router_notify(XiveNotifier *xn, uint32_t lisn);
/*
+ * XIVE2 Presenter (POWER10)
+ */
+
+int xive2_presenter_tctx_match(XivePresenter *xptr, XiveTCTX *tctx,
+ uint8_t format,
+ uint8_t nvt_blk, uint32_t nvt_idx,
+ bool cam_ignore, uint32_t logic_serv);
+
+/*
* XIVE2 END ESBs (POWER10)
*/