diff options
author | Cédric Le Goater <clg@kaod.org> | 2019-07-18 13:54:09 +0200 |
---|---|---|
committer | David Gibson <david@gibson.dropbear.id.au> | 2019-08-21 17:17:39 +1000 |
commit | 53e934921d660be951167fccad4b6302c4633486 (patch) | |
tree | 201ffb7aa88bae4e03fcb05dbe443af0dcf6cf5d /include/hw/ppc/xive_regs.h | |
parent | b4e3066684ea9379e09c8c6b0902eceb939fa97c (diff) |
ppc/xive: Provide unconditional escalation support
When the 'u' bit is set the escalation is said to be 'unconditional'
which means that the ESe PQ bits are not used. Introduce a
xive_router_end_es_notify() routine to share code with the ESn
notification.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20190718115420.19919-7-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'include/hw/ppc/xive_regs.h')
-rw-r--r-- | include/hw/ppc/xive_regs.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/ppc/xive_regs.h b/include/hw/ppc/xive_regs.h index b0c68ab5f7..4378d7259c 100644 --- a/include/hw/ppc/xive_regs.h +++ b/include/hw/ppc/xive_regs.h @@ -210,6 +210,8 @@ typedef struct XiveEND { #define xive_end_is_notify(end) (be32_to_cpu((end)->w0) & END_W0_UCOND_NOTIFY) #define xive_end_is_backlog(end) (be32_to_cpu((end)->w0) & END_W0_BACKLOG) #define xive_end_is_escalate(end) (be32_to_cpu((end)->w0) & END_W0_ESCALATE_CTL) +#define xive_end_is_uncond_escalation(end) \ + (be32_to_cpu((end)->w0) & END_W0_UNCOND_ESCALATE) static inline uint64_t xive_end_qaddr(XiveEND *end) { |