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authorPeter Maydell <peter.maydell@linaro.org>2017-04-26 13:17:11 +0100
committerPeter Maydell <peter.maydell@linaro.org>2017-04-26 13:17:11 +0100
commitdcaed66cbe2803f9378f3a043c2e482bf8035dfd (patch)
treea5611646eb333ac5b2e7049e3e165df8d742530f /include/hw/ppc/pnv_xscom.h
parent52e94ea5de3ed9d7ddf1b0e5fc6ff7c2807ae711 (diff)
parentdf02d2ca8b23ba1fff137090a65731c68cf1393d (diff)
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.10-20170426' into staging
ppc patch queue 2017-04-26 Here's a respind of my first pull request for qemu-2.10, consisting of assorted patches which have accumulated while qemu-2.9 stabilized. Highlights are: * Rework / cleanup of the XICS interrupt controller * Substantial improvement to the 'powernv' machine type - Includes an MMIO XICS version * POWER9 support improvements - POWER9 guests with KVM - Partial support for POWER9 guests with TCG * IOMMU and VFIO improvements * Assorted minor changes There are several IPMI patches here that aren't usually in my area of maintenance, but there isn't a regular maintainer and these patches are for the benefit of the powernv machine type. This pull request supersedes my 2017-04-26 pull request. This new set fixes a bug in one of the aforementioned IPMI patches which caused clang sanitizer failures (and may have crashed on some libc / host versions). # gpg: Signature made Wed 26 Apr 2017 07:58:10 BST # gpg: using RSA key 0x6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-2.10-20170426: (48 commits) MAINTAINERS: Remove myself from e500 target/ppc: Style fixes e500,book3s: mfspr 259: Register mapped/aliased SPRG3 user read target/ppc: Flush TLB on write to PIDR spapr-cpu-core: Release ICPState object during CPU unrealization ppc/pnv: generate an OEM SEL event on shutdown ppc/pnv: add initial IPMI sensors for the BMC simulator ppc/pnv: populate device tree for IPMI BT devices ppc/pnv: populate device tree for serial devices ppc/pnv: populate device tree for RTC devices ppc/pnv: scan ISA bus to populate device tree ppc/pnv: enable only one LPC bus ppc/pnv: Add support for POWER8+ LPC Controller spapr: remove the 'nr_servers' field from the machine target/ppc: Fix size of struct PPCElfPrstatus ipmi: introduce an ipmi_bmc_gen_event() API ipmi: introduce an ipmi_bmc_sdr_find() API ipmi: provide support for FRUs ipmi: use a file to load SDRs ppc: add IPMI support ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/ppc/pnv_xscom.h')
-rw-r--r--include/hw/ppc/pnv_xscom.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h
index 0faa1847bf..3757b2cab9 100644
--- a/include/hw/ppc/pnv_xscom.h
+++ b/include/hw/ppc/pnv_xscom.h
@@ -60,6 +60,12 @@ typedef struct PnvXScomInterfaceClass {
#define PNV_XSCOM_LPC_BASE 0xb0020
#define PNV_XSCOM_LPC_SIZE 0x4
+#define PNV_XSCOM_PSIHB_BASE 0x2010900
+#define PNV_XSCOM_PSIHB_SIZE 0x20
+
+#define PNV_XSCOM_OCC_BASE 0x0066000
+#define PNV_XSCOM_OCC_SIZE 0x6000
+
extern void pnv_xscom_realize(PnvChip *chip, Error **errp);
extern int pnv_xscom_populate(PnvChip *chip, void *fdt, int offset);