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authorNicholas Piggin <npiggin@gmail.com>2023-11-23 18:02:36 +1000
committerNicholas Piggin <npiggin@gmail.com>2024-02-23 23:24:43 +1000
commitcde2ba34a951997f01c184acf6e3a29eb6a81e79 (patch)
tree340ee414749fc39e8cc3eca9acb0e2d35414d3db /include/hw/ppc/pnv_chiptod.h
parentde3ba0cc38ffb96265f29c2399df0a5c0f301f40 (diff)
ppc/pnv: Implement the ChipTOD to Core transfer
One of the functions of the ChipTOD is to transfer TOD to the Core (aka PC - Pervasive Core) timebase facility. The ChipTOD can be programmed with a target address to send the TOD value to. The hardware implementation seems to perform this by sending the TOD value to a SCOM address. This implementation grabs the core directly and manipulates the timebase facility state in the core. This is a hack, but it works enough for now. A better implementation would implement the transfer to the PnvCore xscom register and drive the timebase state machine from there. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'include/hw/ppc/pnv_chiptod.h')
-rw-r--r--include/hw/ppc/pnv_chiptod.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/hw/ppc/pnv_chiptod.h b/include/hw/ppc/pnv_chiptod.h
index ca770525d9..fde569bcbf 100644
--- a/include/hw/ppc/pnv_chiptod.h
+++ b/include/hw/ppc/pnv_chiptod.h
@@ -25,6 +25,8 @@ enum tod_state {
tod_stopped = 1,
};
+typedef struct PnvCore PnvCore;
+
struct PnvChipTOD {
DeviceState xd;
@@ -36,12 +38,14 @@ struct PnvChipTOD {
enum tod_state tod_state;
uint64_t tod_error;
uint64_t pss_mss_ctrl_reg;
+ PnvCore *slave_pc_target;
};
struct PnvChipTODClass {
DeviceClass parent_class;
void (*broadcast_ttype)(PnvChipTOD *sender, uint32_t trigger);
+ PnvCore *(*tx_ttype_target)(PnvChipTOD *chiptod, uint64_t val);
int xscom_size;
};