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authorCédric Le Goater <clg@kaod.org>2019-12-05 19:44:53 +0100
committerDavid Gibson <david@gibson.dropbear.id.au>2019-12-17 10:39:48 +1100
commit8b50ce850538223b8dd2c2f4ed8a819d3c60bfc1 (patch)
tree05911ade07950427f819c7fc7456b0103583450b /include/hw/ppc/pnv.h
parentc5412b1d28535f8a2c252c9b62634389b83cae48 (diff)
ppc/pnv: add a PSI bridge model for POWER10
The POWER10 PSIHB controller is very similar to the one on POWER9. We should probably introduce a common PnvPsiXive object. The ESB page size should be changed to 64k when P10 support is ready. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20191205184454.10722-5-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'include/hw/ppc/pnv.h')
-rw-r--r--include/hw/ppc/pnv.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index bfa61edfba..47b7370b27 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -112,6 +112,9 @@ typedef struct Pnv9Chip {
typedef struct Pnv10Chip {
/*< private >*/
PnvChip parent_obj;
+
+ /*< public >*/
+ Pnv9Psi psi;
} Pnv10Chip;
typedef struct PnvChipClass {
@@ -326,4 +329,10 @@ IPMIBmc *pnv_bmc_create(void);
#define PNV10_XSCOM_SIZE 0x0000000400000000ull
#define PNV10_XSCOM_BASE(chip) PNV10_CHIP_BASE(chip, 0x00603fc00000000ull)
+#define PNV10_PSIHB_ESB_SIZE 0x0000000000100000ull
+#define PNV10_PSIHB_ESB_BASE(chip) PNV10_CHIP_BASE(chip, 0x0006030202000000ull)
+
+#define PNV10_PSIHB_SIZE 0x0000000000100000ull
+#define PNV10_PSIHB_BASE(chip) PNV10_CHIP_BASE(chip, 0x0006030203000000ull)
+
#endif /* PPC_PNV_H */