aboutsummaryrefslogtreecommitdiff
path: root/include/hw/mips/cps.h
diff options
context:
space:
mode:
authorLeon Alrae <leon.alrae@imgtec.com>2016-03-28 19:35:52 -0700
committerLeon Alrae <leon.alrae@imgtec.com>2016-07-12 09:10:13 +0100
commit19494f811a43c6bc226aa272d86300d9229224fe (patch)
tree50d232e81783cb853b087fad2a3cd98495309818 /include/hw/mips/cps.h
parente8bd336dd1af6d1073e9411bd1c47b045988b30a (diff)
hw/mips/cps: create GIC block inside CPS
Add GIC to CPS and expose its interrupt pins instead of CPU's. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'include/hw/mips/cps.h')
-rw-r--r--include/hw/mips/cps.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/mips/cps.h b/include/hw/mips/cps.h
index 4dbae9c8c9..526b8d0b11 100644
--- a/include/hw/mips/cps.h
+++ b/include/hw/mips/cps.h
@@ -22,6 +22,7 @@
#include "hw/sysbus.h"
#include "hw/misc/mips_cmgcr.h"
+#include "hw/intc/mips_gic.h"
#include "hw/misc/mips_cpc.h"
#include "hw/misc/mips_itu.h"
@@ -37,6 +38,7 @@ typedef struct MIPSCPSState {
MemoryRegion container;
MIPSGCRState gcr;
+ MIPSGICState gic;
MIPSCPCState cpc;
MIPSITUState itu;
} MIPSCPSState;