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authorEduardo Habkost <ehabkost@redhat.com>2020-09-03 16:43:22 -0400
committerEduardo Habkost <ehabkost@redhat.com>2020-09-09 09:26:43 -0400
commitdb1015e92e04835c9eb50c29625fe566d1202dbd (patch)
tree41fbc0bf3e3f29b7ecb339224a049e3f2a7db8fa /include/hw/i386
parent1c8eef0227e2942264063f22f10a06b84e0d3fa9 (diff)
Move QOM typedefs and add missing includes
Some typedefs and macros are defined after the type check macros. This makes it difficult to automatically replace their definitions with OBJECT_DECLARE_TYPE. Patch generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=QOMStructTypedefSplit $(git grep -l '' -- '*.[ch]') which will split "typdef struct { ... } TypedefName" declarations. Followed by: $ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \ $(git grep -l '' -- '*.[ch]') which will: - move the typedefs and #defines above the type check macros - add missing #include "qom/object.h" lines if necessary Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-9-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-10-ehabkost@redhat.com> Message-Id: <20200831210740.126168-11-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'include/hw/i386')
-rw-r--r--include/hw/i386/apic_internal.h7
-rw-r--r--include/hw/i386/ich9.h6
-rw-r--r--include/hw/i386/intel_iommu.h3
-rw-r--r--include/hw/i386/ioapic_internal.h6
-rw-r--r--include/hw/i386/microvm.h11
-rw-r--r--include/hw/i386/pc.h6
-rw-r--r--include/hw/i386/x86-iommu.h5
-rw-r--r--include/hw/i386/x86.h11
8 files changed, 35 insertions, 20 deletions
diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_internal.h
index 2597000e03..124f1fad6f 100644
--- a/include/hw/i386/apic_internal.h
+++ b/include/hw/i386/apic_internal.h
@@ -25,6 +25,7 @@
#include "exec/memory.h"
#include "qemu/timer.h"
#include "target/i386/cpu-qom.h"
+#include "qom/object.h"
/* APIC Local Vector Table */
#define APIC_LVT_TIMER 0
@@ -125,6 +126,7 @@
typedef struct APICCommonState APICCommonState;
#define TYPE_APIC_COMMON "apic-common"
+typedef struct APICCommonClass APICCommonClass;
#define APIC_COMMON(obj) \
OBJECT_CHECK(APICCommonState, (obj), TYPE_APIC_COMMON)
#define APIC_COMMON_CLASS(klass) \
@@ -132,8 +134,7 @@ typedef struct APICCommonState APICCommonState;
#define APIC_COMMON_GET_CLASS(obj) \
OBJECT_GET_CLASS(APICCommonClass, (obj), TYPE_APIC_COMMON)
-typedef struct APICCommonClass
-{
+struct APICCommonClass {
DeviceClass parent_class;
DeviceRealize realize;
@@ -151,7 +152,7 @@ typedef struct APICCommonClass
* device, but it's convenient to have it here for now.
*/
void (*send_msi)(MSIMessage *msi);
-} APICCommonClass;
+};
struct APICCommonState {
/*< private >*/
diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h
index a98d10b252..8fdac227f2 100644
--- a/include/hw/i386/ich9.h
+++ b/include/hw/i386/ich9.h
@@ -11,6 +11,7 @@
#include "hw/acpi/acpi.h"
#include "hw/acpi/ich9.h"
#include "hw/pci/pci_bus.h"
+#include "qom/object.h"
void ich9_lpc_set_irq(void *opaque, int irq_num, int level);
int ich9_lpc_map_irq(PCIDevice *pci_dev, int intx);
@@ -23,10 +24,11 @@ void ich9_generate_smi(void);
#define ICH9_CC_SIZE (16 * 1024) /* 16KB. Chipset configuration registers */
#define TYPE_ICH9_LPC_DEVICE "ICH9-LPC"
+typedef struct ICH9LPCState ICH9LPCState;
#define ICH9_LPC_DEVICE(obj) \
OBJECT_CHECK(ICH9LPCState, (obj), TYPE_ICH9_LPC_DEVICE)
-typedef struct ICH9LPCState {
+struct ICH9LPCState {
/* ICH9 LPC PCI to ISA bridge */
PCIDevice d;
@@ -77,7 +79,7 @@ typedef struct ICH9LPCState {
Notifier machine_ready;
qemu_irq gsi[GSI_NUM_PINS];
-} ICH9LPCState;
+};
#define Q35_MASK(bit, ms_bit, ls_bit) \
((uint##bit##_t)(((1ULL << ((ms_bit) + 1)) - 1) & ~((1ULL << ls_bit) - 1)))
diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h
index 3870052f5f..53e5d32d54 100644
--- a/include/hw/i386/intel_iommu.h
+++ b/include/hw/i386/intel_iommu.h
@@ -24,8 +24,10 @@
#include "hw/i386/x86-iommu.h"
#include "qemu/iova-tree.h"
+#include "qom/object.h"
#define TYPE_INTEL_IOMMU_DEVICE "intel-iommu"
+typedef struct IntelIOMMUState IntelIOMMUState;
#define INTEL_IOMMU_DEVICE(obj) \
OBJECT_CHECK(IntelIOMMUState, (obj), TYPE_INTEL_IOMMU_DEVICE)
@@ -56,7 +58,6 @@
typedef struct VTDContextEntry VTDContextEntry;
typedef struct VTDContextCacheEntry VTDContextCacheEntry;
-typedef struct IntelIOMMUState IntelIOMMUState;
typedef struct VTDAddressSpace VTDAddressSpace;
typedef struct VTDIOTLBEntry VTDIOTLBEntry;
typedef struct VTDBus VTDBus;
diff --git a/include/hw/i386/ioapic_internal.h b/include/hw/i386/ioapic_internal.h
index fe06938bda..29ae150727 100644
--- a/include/hw/i386/ioapic_internal.h
+++ b/include/hw/i386/ioapic_internal.h
@@ -25,6 +25,7 @@
#include "exec/memory.h"
#include "hw/sysbus.h"
#include "qemu/notify.h"
+#include "qom/object.h"
#define MAX_IOAPICS 1
@@ -84,6 +85,7 @@
typedef struct IOAPICCommonState IOAPICCommonState;
#define TYPE_IOAPIC_COMMON "ioapic-common"
+typedef struct IOAPICCommonClass IOAPICCommonClass;
#define IOAPIC_COMMON(obj) \
OBJECT_CHECK(IOAPICCommonState, (obj), TYPE_IOAPIC_COMMON)
#define IOAPIC_COMMON_CLASS(klass) \
@@ -91,14 +93,14 @@ typedef struct IOAPICCommonState IOAPICCommonState;
#define IOAPIC_COMMON_GET_CLASS(obj) \
OBJECT_GET_CLASS(IOAPICCommonClass, (obj), TYPE_IOAPIC_COMMON)
-typedef struct IOAPICCommonClass {
+struct IOAPICCommonClass {
SysBusDeviceClass parent_class;
DeviceRealize realize;
DeviceUnrealize unrealize;
void (*pre_save)(IOAPICCommonState *s);
void (*post_load)(IOAPICCommonState *s);
-} IOAPICCommonClass;
+};
struct IOAPICCommonState {
SysBusDevice busdev;
diff --git a/include/hw/i386/microvm.h b/include/hw/i386/microvm.h
index fd34b78e0d..0556f64206 100644
--- a/include/hw/i386/microvm.h
+++ b/include/hw/i386/microvm.h
@@ -24,6 +24,7 @@
#include "hw/boards.h"
#include "hw/i386/x86.h"
+#include "qom/object.h"
/* Platform virtio definitions */
#define VIRTIO_MMIO_BASE 0xfeb00000
@@ -39,13 +40,14 @@
#define MICROVM_MACHINE_OPTION_ROMS "x-option-roms"
#define MICROVM_MACHINE_AUTO_KERNEL_CMDLINE "auto-kernel-cmdline"
-typedef struct {
+struct MicrovmMachineClass {
X86MachineClass parent;
HotplugHandler *(*orig_hotplug_handler)(MachineState *machine,
DeviceState *dev);
-} MicrovmMachineClass;
+};
+typedef struct MicrovmMachineClass MicrovmMachineClass;
-typedef struct {
+struct MicrovmMachineState {
X86MachineState parent;
/* Machine type options */
@@ -58,7 +60,8 @@ typedef struct {
/* Machine state */
bool kernel_cmdline_fixed;
-} MicrovmMachineState;
+};
+typedef struct MicrovmMachineState MicrovmMachineState;
#define TYPE_MICROVM_MACHINE MACHINE_TYPE_NAME("microvm")
#define MICROVM_MACHINE(obj) \
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index fe52e165b2..602b57dc5d 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -10,6 +10,7 @@
#include "hw/acpi/acpi_dev_interface.h"
#include "hw/hotplug.h"
+#include "qom/object.h"
#define HPET_INTCAP "hpet-intcap"
@@ -76,7 +77,7 @@ struct PCMachineState {
* way we can use 1GByte pages in the host.
*
*/
-typedef struct PCMachineClass {
+struct PCMachineClass {
/*< private >*/
X86MachineClass parent_class;
@@ -118,7 +119,8 @@ typedef struct PCMachineClass {
/* use PVH to load kernels that support this feature */
bool pvh_enabled;
-} PCMachineClass;
+};
+typedef struct PCMachineClass PCMachineClass;
#define TYPE_PC_MACHINE "generic-pc-machine"
#define PC_MACHINE(obj) \
diff --git a/include/hw/i386/x86-iommu.h b/include/hw/i386/x86-iommu.h
index 18420ada15..dae2eab800 100644
--- a/include/hw/i386/x86-iommu.h
+++ b/include/hw/i386/x86-iommu.h
@@ -23,8 +23,11 @@
#include "hw/sysbus.h"
#include "hw/pci/pci.h"
#include "hw/pci/msi.h"
+#include "qom/object.h"
#define TYPE_X86_IOMMU_DEVICE ("x86-iommu")
+typedef struct X86IOMMUClass X86IOMMUClass;
+typedef struct X86IOMMUState X86IOMMUState;
#define X86_IOMMU_DEVICE(obj) \
OBJECT_CHECK(X86IOMMUState, (obj), TYPE_X86_IOMMU_DEVICE)
#define X86_IOMMU_DEVICE_CLASS(klass) \
@@ -34,8 +37,6 @@
#define X86_IOMMU_SID_INVALID (0xffff)
-typedef struct X86IOMMUState X86IOMMUState;
-typedef struct X86IOMMUClass X86IOMMUClass;
typedef struct X86IOMMUIrq X86IOMMUIrq;
typedef struct X86IOMMU_MSIMessage X86IOMMU_MSIMessage;
diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h
index 4d9a26326d..42d46cc404 100644
--- a/include/hw/i386/x86.h
+++ b/include/hw/i386/x86.h
@@ -26,8 +26,9 @@
#include "hw/nmi.h"
#include "hw/isa/isa.h"
#include "hw/i386/ioapic.h"
+#include "qom/object.h"
-typedef struct {
+struct X86MachineClass {
/*< private >*/
MachineClass parent;
@@ -37,9 +38,10 @@ typedef struct {
bool save_tsc_khz;
/* Enables contiguous-apic-ID mode */
bool compat_apic_id_mode;
-} X86MachineClass;
+};
+typedef struct X86MachineClass X86MachineClass;
-typedef struct {
+struct X86MachineState {
/*< private >*/
MachineState parent;
@@ -68,7 +70,8 @@ typedef struct {
* will be translated to MSI messages in the address space.
*/
AddressSpace *ioapic_as;
-} X86MachineState;
+};
+typedef struct X86MachineState X86MachineState;
#define X86_MACHINE_SMM "smm"
#define X86_MACHINE_ACPI "acpi"