diff options
author | Paolo Bonzini <pbonzini@redhat.com> | 2019-10-22 09:39:50 +0200 |
---|---|---|
committer | Paolo Bonzini <pbonzini@redhat.com> | 2019-10-22 09:39:50 +0200 |
commit | f0bb276bf8d5b3df57697357b802ca76e4cdf05f (patch) | |
tree | 316e0cd59b14d13a5ba4471d6a75c297f0603afe /include/hw/i386/x86.h | |
parent | 549e984e67d8b3ea868be4ba935cecb9c1e753dc (diff) |
hw/i386: split PCMachineState deriving X86MachineState from it
Split up PCMachineState and PCMachineClass and derive X86MachineState
and X86MachineClass from them. This allows sharing code with non-PC
x86 machine types.
Signed-off-by: Sergio Lopez <slp@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'include/hw/i386/x86.h')
-rw-r--r-- | include/hw/i386/x86.h | 58 |
1 files changed, 57 insertions, 1 deletions
diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h index 71e2b6985d..d15713e92e 100644 --- a/include/hw/i386/x86.h +++ b/include/hw/i386/x86.h @@ -17,7 +17,63 @@ #ifndef HW_I386_X86_H #define HW_I386_X86_H +#include "qemu-common.h" +#include "exec/hwaddr.h" +#include "qemu/notify.h" + #include "hw/boards.h" +#include "hw/nmi.h" + +typedef struct { + /*< private >*/ + MachineClass parent; + + /*< public >*/ + + /* Enables contiguous-apic-ID mode */ + bool compat_apic_id_mode; +} X86MachineClass; + +typedef struct { + /*< private >*/ + MachineState parent; + + /*< public >*/ + + /* Pointers to devices and objects: */ + ISADevice *rtc; + FWCfgState *fw_cfg; + qemu_irq *gsi; + GMappedFile *initrd_mapped_file; + + /* Configuration options: */ + uint64_t max_ram_below_4g; + + /* RAM information (sizes, addresses, configuration): */ + ram_addr_t below_4g_mem_size, above_4g_mem_size; + + /* CPU and apic information: */ + bool apic_xrupt_override; + unsigned apic_id_limit; + uint16_t boot_cpus; + unsigned smp_dies; + + /* + * Address space used by IOAPIC device. All IOAPIC interrupts + * will be translated to MSI messages in the address space. + */ + AddressSpace *ioapic_as; +} X86MachineState; + +#define X86_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" + +#define TYPE_X86_MACHINE MACHINE_TYPE_NAME("x86") +#define X86_MACHINE(obj) \ + OBJECT_CHECK(X86MachineState, (obj), TYPE_X86_MACHINE) +#define X86_MACHINE_GET_CLASS(obj) \ + OBJECT_GET_CLASS(X86MachineClass, obj, TYPE_X86_MACHINE) +#define X86_MACHINE_CLASS(class) \ + OBJECT_CLASS_CHECK(X86MachineClass, class, TYPE_X86_MACHINE) uint32_t x86_cpu_apic_id_from_index(PCMachineState *pcms, unsigned int cpu_index); @@ -30,6 +86,6 @@ const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms); void x86_bios_rom_init(MemoryRegion *rom_memory, bool isapc_ram_fw); -void x86_load_linux(PCMachineState *x86ms, FWCfgState *fw_cfg); +void x86_load_linux(PCMachineState *pcms, FWCfgState *fw_cfg); #endif |