diff options
| author | Cédric Le Goater <clg@kaod.org> | 2021-03-09 12:01:28 +0100 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2021-03-09 12:01:28 +0100 |
| commit | 2ecf17264debe1bc3399fe587690c78d03e8401b (patch) | |
| tree | 792d6d3331647aff8e0d1e5a587b240bcb0d19dc /include/hw/arm | |
| parent | 6820588efa4fbab9ab6f0457f2c83c3bc7498ae3 (diff) | |
hw/misc: Add a basic Aspeed LPC controller model
This is a very minimal framework to access registers which are used to
configure the AHB memory mapping of the flash chips on the LPC HC
Firmware address space.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Message-Id: <20210302014317.915120-5-andrew@aj.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'include/hw/arm')
| -rw-r--r-- | include/hw/arm/aspeed_soc.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index 11cfe6e358..42c64bd28b 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -28,6 +28,7 @@ #include "hw/sd/aspeed_sdhci.h" #include "hw/usb/hcd-ehci.h" #include "qom/object.h" +#include "hw/misc/aspeed_lpc.h" #define ASPEED_SPIS_NUM 2 #define ASPEED_EHCIS_NUM 2 @@ -61,6 +62,7 @@ struct AspeedSoCState { AspeedGPIOState gpio_1_8v; AspeedSDHCIState sdhci; AspeedSDHCIState emmc; + AspeedLPCState lpc; }; #define TYPE_ASPEED_SOC "aspeed-soc" |