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authorCédric Le Goater <clg@kaod.org>2016-09-06 19:52:17 +0100
committerPeter Maydell <peter.maydell@linaro.org>2016-09-06 19:52:17 +0100
commitc2da8a8b90faf0b77417e08fa942af1ff0f7cdc3 (patch)
tree2258604fba53b490d84133d84efec72e555be6da /include/hw/arm
parent2926375cffce464fde6b4dabaed1e133d549af39 (diff)
ast2400: add a memory controller device model
The uboot in the previous release of the SDK was using a hardcoded value for memory size. This is not true anymore, the value is now retrieved from the memory controller. Below is a model for this device, only supporting unlock and configuration. Without it, we endup running a guest with 64MB, which is a bit low nowdays. It uses a 'silicon-rev' property and ram_size to build a default value. Some bits should be linked to SCU strapping registers but it seems a bit complex to add for the current need. The model is ready for the AST2500 SOC. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/arm')
-rw-r--r--include/hw/arm/ast2400.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/arm/ast2400.h b/include/hw/arm/ast2400.h
index 7833bc716c..e68807d475 100644
--- a/include/hw/arm/ast2400.h
+++ b/include/hw/arm/ast2400.h
@@ -15,6 +15,7 @@
#include "hw/arm/arm.h"
#include "hw/intc/aspeed_vic.h"
#include "hw/misc/aspeed_scu.h"
+#include "hw/misc/aspeed_sdmc.h"
#include "hw/timer/aspeed_timer.h"
#include "hw/i2c/aspeed_i2c.h"
#include "hw/ssi/aspeed_smc.h"
@@ -32,6 +33,7 @@ typedef struct AST2400State {
AspeedSCUState scu;
AspeedSMCState smc;
AspeedSMCState spi;
+ AspeedSDMCState sdmc;
} AST2400State;
#define TYPE_AST2400 "ast2400"