aboutsummaryrefslogtreecommitdiff
path: root/include/hw/arm
diff options
context:
space:
mode:
authorJoel Stanley <joel@jms.id.au>2019-07-01 17:26:16 +0100
committerPeter Maydell <peter.maydell@linaro.org>2019-07-01 17:28:59 +0100
commit75fb4577fc1b7ae87cb7842aa7fe59ae4de5e95e (patch)
treeb16c4f9dbe00b3cde1d722c05675e739c16022a0 /include/hw/arm
parent979672cf51533ac629b925fea096eb6bfe25261a (diff)
hw/arm/aspeed: Add RTC to SoC
All systems have an RTC. The IRQ is hooked up but the model does not use it at this stage. There is no guest code that uses it, so this limitation is acceptable. Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20190618165311.27066-5-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/arm')
-rw-r--r--include/hw/arm/aspeed_soc.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index 88b901d5df..fa0ba957a6 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -16,6 +16,7 @@
#include "hw/misc/aspeed_scu.h"
#include "hw/misc/aspeed_sdmc.h"
#include "hw/timer/aspeed_timer.h"
+#include "hw/timer/aspeed_rtc.h"
#include "hw/i2c/aspeed_i2c.h"
#include "hw/ssi/aspeed_smc.h"
#include "hw/watchdog/wdt_aspeed.h"
@@ -32,6 +33,7 @@ typedef struct AspeedSoCState {
ARMCPU cpu;
MemoryRegion sram;
AspeedVICState vic;
+ AspeedRtcState rtc;
AspeedTimerCtrlState timerctrl;
AspeedI2CState i2c;
AspeedSCUState scu;