diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2021-09-01 17:45:38 +0100 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2021-09-01 17:45:38 +0100 |
commit | 079b1252e9de384385c9da910262312ec2e574c8 (patch) | |
tree | b18dfec9ce1edd5412bac5bc612f0c2989eacb01 /include/hw/arm | |
parent | 4c41a1c595e1ce3fe29f3b7bb22ff7402be9c77d (diff) | |
parent | 683754c7b61f9e2ff098720ec80c9ab86c54663d (diff) |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210901' into staging
* Refactor M-profile systick to use Clocks instead of system_clock_scale global
* clock: Provide builtin multiplier/divider
* Add A64FX processor model
* Enable MVE emulation in Cortex-M55
* hw: Add compat machines for 6.2
* hw/intc/arm_gicv3: Replace mis-used MEMTX_* constants by booleans
* hw/arm/raspi: Remove deprecated raspi2/raspi3 aliases
# gpg: Signature made Wed 01 Sep 2021 11:35:57 BST
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20210901: (51 commits)
arm: Remove system_clock_scale global
hw/timer/stellaris-gptm: Use Clock input instead of system_clock_scale
hw/arm/stellaris: Split stellaris-gptm into its own file
hw/arm/stellaris: Fix code style issues in GPTM code
hw/timer/armv7m_systick: Use clock inputs instead of system_clock_scale
hw/arm/msf2-soc: Wire up refclk
hw/arm/msf2: Use Clock input to MSF2_SOC instead of m3clk property
hw/arm/msf2_soc: Don't allocate separate MemoryRegions
hw/arm/stellaris: Wire sysclk up to armv7m
hw/arm/stellaris: split stellaris_sys_init()
hw/arm/nrf51: Wire up sysclk
hw/arm/stm32vldiscovery: Delete trailing blank line
hw/arm/stm32f405: Wire up sysclk and refclk
hw/arm/stm32f205: Wire up sysclk and refclk
hw/arm/stm32f100: Wire up sysclk and refclk
hw/arm: Don't allocate separate MemoryRegions in stm32 SoC realize
clock: Provide builtin multiplier/divider
hw/arm/mps2.c: Connect up armv7m clocks
armsse: Wire up systick cpuclk clock
hw/arm/armv7m: Create input clocks
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/arm')
-rw-r--r-- | include/hw/arm/armv7m.h | 24 | ||||
-rw-r--r-- | include/hw/arm/msf2-soc.h | 8 | ||||
-rw-r--r-- | include/hw/arm/nrf51_soc.h | 2 | ||||
-rw-r--r-- | include/hw/arm/stm32f100_soc.h | 8 | ||||
-rw-r--r-- | include/hw/arm/stm32f205_soc.h | 8 | ||||
-rw-r--r-- | include/hw/arm/stm32f405_soc.h | 3 |
6 files changed, 52 insertions, 1 deletions
diff --git a/include/hw/arm/armv7m.h b/include/hw/arm/armv7m.h index bc6733c518..b7ba0ff409 100644 --- a/include/hw/arm/armv7m.h +++ b/include/hw/arm/armv7m.h @@ -12,8 +12,10 @@ #include "hw/sysbus.h" #include "hw/intc/armv7m_nvic.h" +#include "hw/misc/armv7m_ras.h" #include "target/arm/idau.h" #include "qom/object.h" +#include "hw/clock.h" #define TYPE_BITBAND "ARM-bitband-memory" OBJECT_DECLARE_SIMPLE_TYPE(BitBandState, BITBAND) @@ -50,6 +52,8 @@ OBJECT_DECLARE_SIMPLE_TYPE(ARMv7MState, ARMV7M) * + Property "vfp": enable VFP (forwarded to CPU object) * + Property "dsp": enable DSP (forwarded to CPU object) * + Property "enable-bitband": expose bitbanded IO + * + Clock input "refclk" is the external reference clock for the systick timers + * + Clock input "cpuclk" is the main CPU clock */ struct ARMv7MState { /*< private >*/ @@ -58,11 +62,31 @@ struct ARMv7MState { NVICState nvic; BitBandState bitband[ARMV7M_NUM_BITBANDS]; ARMCPU *cpu; + ARMv7MRAS ras; + SysTickState systick[M_REG_NUM_BANKS]; /* MemoryRegion we pass to the CPU, with our devices layered on * top of the ones the board provides in board_memory. */ MemoryRegion container; + /* + * MemoryRegion which passes the transaction to either the S or the + * NS systick device depending on the transaction attributes + */ + MemoryRegion systickmem; + /* + * MemoryRegion which enforces the S/NS handling of the systick + * device NS alias region and passes the transaction to the + * NS systick device if appropriate. + */ + MemoryRegion systick_ns_mem; + /* Ditto, for the sysregs region provided by the NVIC */ + MemoryRegion sysreg_ns_mem; + /* MR providing default PPB behaviour */ + MemoryRegion defaultmem; + + Clock *refclk; + Clock *cpuclk; /* Properties */ char *cpu_type; diff --git a/include/hw/arm/msf2-soc.h b/include/hw/arm/msf2-soc.h index d406184685..ce417a6266 100644 --- a/include/hw/arm/msf2-soc.h +++ b/include/hw/arm/msf2-soc.h @@ -30,6 +30,7 @@ #include "hw/misc/msf2-sysreg.h" #include "hw/ssi/mss-spi.h" #include "hw/net/msf2-emac.h" +#include "hw/clock.h" #include "qom/object.h" #define TYPE_MSF2_SOC "msf2-soc" @@ -57,7 +58,8 @@ struct MSF2State { uint64_t envm_size; uint64_t esram_size; - uint32_t m3clk; + Clock *m3clk; + Clock *refclk; uint8_t apb0div; uint8_t apb1div; @@ -65,6 +67,10 @@ struct MSF2State { MSSTimerState timer; MSSSpiState spi[MSF2_NUM_SPIS]; MSF2EmacState emac; + + MemoryRegion nvm; + MemoryRegion nvm_alias; + MemoryRegion sram; }; #endif diff --git a/include/hw/arm/nrf51_soc.h b/include/hw/arm/nrf51_soc.h index f8a6725b77..e52a56e75e 100644 --- a/include/hw/arm/nrf51_soc.h +++ b/include/hw/arm/nrf51_soc.h @@ -17,6 +17,7 @@ #include "hw/gpio/nrf51_gpio.h" #include "hw/nvram/nrf51_nvm.h" #include "hw/timer/nrf51_timer.h" +#include "hw/clock.h" #include "qom/object.h" #define TYPE_NRF51_SOC "nrf51-soc" @@ -50,6 +51,7 @@ struct NRF51State { MemoryRegion container; + Clock *sysclk; }; #endif diff --git a/include/hw/arm/stm32f100_soc.h b/include/hw/arm/stm32f100_soc.h index 71bffcf4fd..40cd415b28 100644 --- a/include/hw/arm/stm32f100_soc.h +++ b/include/hw/arm/stm32f100_soc.h @@ -29,6 +29,7 @@ #include "hw/ssi/stm32f2xx_spi.h" #include "hw/arm/armv7m.h" #include "qom/object.h" +#include "hw/clock.h" #define TYPE_STM32F100_SOC "stm32f100-soc" OBJECT_DECLARE_SIMPLE_TYPE(STM32F100State, STM32F100_SOC) @@ -52,6 +53,13 @@ struct STM32F100State { STM32F2XXUsartState usart[STM_NUM_USARTS]; STM32F2XXSPIState spi[STM_NUM_SPIS]; + + MemoryRegion sram; + MemoryRegion flash; + MemoryRegion flash_alias; + + Clock *sysclk; + Clock *refclk; }; #endif diff --git a/include/hw/arm/stm32f205_soc.h b/include/hw/arm/stm32f205_soc.h index 985ff63aa9..849d3ed889 100644 --- a/include/hw/arm/stm32f205_soc.h +++ b/include/hw/arm/stm32f205_soc.h @@ -32,6 +32,7 @@ #include "hw/or-irq.h" #include "hw/ssi/stm32f2xx_spi.h" #include "hw/arm/armv7m.h" +#include "hw/clock.h" #include "qom/object.h" #define TYPE_STM32F205_SOC "stm32f205-soc" @@ -63,6 +64,13 @@ struct STM32F205State { STM32F2XXSPIState spi[STM_NUM_SPIS]; qemu_or_irq *adc_irqs; + + MemoryRegion sram; + MemoryRegion flash; + MemoryRegion flash_alias; + + Clock *sysclk; + Clock *refclk; }; #endif diff --git a/include/hw/arm/stm32f405_soc.h b/include/hw/arm/stm32f405_soc.h index 347105e709..5bb0c8d569 100644 --- a/include/hw/arm/stm32f405_soc.h +++ b/include/hw/arm/stm32f405_soc.h @@ -68,6 +68,9 @@ struct STM32F405State { MemoryRegion sram; MemoryRegion flash; MemoryRegion flash_alias; + + Clock *sysclk; + Clock *refclk; }; #endif |