diff options
| author | Joel Stanley <joel@jms.id.au> | 2019-09-25 16:32:36 +0200 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-10-15 18:09:04 +0100 |
| commit | 6b2b2a703cad4c2138b848dcdcc65634c2823c08 (patch) | |
| tree | 45202feec5a85c9a131525bac6a23e66764d31f7 /include/hw/arm/aspeed_soc.h | |
| parent | 6112bd6d9b8e03c1c454c4785a56402573ccb16e (diff) | |
hw: wdt_aspeed: Add AST2600 support
The AST2600 has four watchdogs, and they each have a 0x40 of registers.
When running as part of an ast2600 system we must check a different
offset for the system reset control register in the SCU.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-id: 20190925143248.10000-12-clg@kaod.org
[clg: - reworked model integration into new object class ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/arm/aspeed_soc.h')
| -rw-r--r-- | include/hw/arm/aspeed_soc.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index ba5bbb53e1..b427f2668a 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -27,7 +27,7 @@ #include "hw/sd/aspeed_sdhci.h" #define ASPEED_SPIS_NUM 2 -#define ASPEED_WDTS_NUM 3 +#define ASPEED_WDTS_NUM 4 #define ASPEED_CPUS_NUM 2 #define ASPEED_MACS_NUM 2 |