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authorPeter Maydell <peter.maydell@linaro.org>2014-05-15 15:38:39 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-05-15 15:38:40 +0100
commitef3cb5ca82c341e575ee5cb9a9dd8edc6aa96b1b (patch)
tree1ec45abf7d4bcadc6bfa97e2be4d23e549d02eec /include/exec
parent06e33c1c3c193074574eb3813eded91bff0fc86f (diff)
parent4700a316df7d2cdcd256dcd64a10cec643f4dfa1 (diff)
Merge remote-tracking branch 'remotes/kvm/uq/master' into staging
* remotes/kvm/uq/master: pc: port 92 reset requires a low->high transition cpu: make CPU_INTERRUPT_RESET available on all targets apic: do not accept SIPI on the bootstrap processor target-i386: preserve FPU and MSR state on INIT target-i386: fix set of registers zeroed on reset kvm: forward INIT signals coming from the chipset kvm: reset state from the CPU's reset method target-i386: the x86 CPL is stored in CS.selector - auto update hflags accordingly. target-i386: set eflags prior to calling cpu_x86_load_seg_cache() in seg_helper.c target-i386: set eflags and cr0 prior to calling cpu_x86_load_seg_cache() in smm_helper.c target-i386: set eflags prior to calling svm_load_seg_cache() in svm_helper.c pci-assign: limit # of msix vectors pci-assign: Fix a bug when map MSI-X table memory failed kvm: make one_reg helpers available for everyone target-i386: Remove unused data from local array Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/exec')
-rw-r--r--include/exec/cpu-all.h8
1 files changed, 5 insertions, 3 deletions
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index fb649a4029..9cab592dc5 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -381,6 +381,9 @@ CPUArchState *cpu_copy(CPUArchState *env);
/* Debug event pending. */
#define CPU_INTERRUPT_DEBUG 0x0080
+/* Reset signal. */
+#define CPU_INTERRUPT_RESET 0x0400
+
/* Several target-specific external hardware interrupts. Each target/cpu.h
should define proper names based on these defines. */
#define CPU_INTERRUPT_TGT_EXT_0 0x0008
@@ -395,9 +398,8 @@ CPUArchState *cpu_copy(CPUArchState *env);
instruction being executed. These, therefore, are not masked while
single-stepping within the debugger. */
#define CPU_INTERRUPT_TGT_INT_0 0x0100
-#define CPU_INTERRUPT_TGT_INT_1 0x0400
-#define CPU_INTERRUPT_TGT_INT_2 0x0800
-#define CPU_INTERRUPT_TGT_INT_3 0x2000
+#define CPU_INTERRUPT_TGT_INT_1 0x0800
+#define CPU_INTERRUPT_TGT_INT_2 0x2000
/* First unused bit: 0x4000. */