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authorRichard Henderson <richard.henderson@linaro.org>2022-06-27 16:47:39 +0530
committerRichard Henderson <richard.henderson@linaro.org>2022-06-27 16:47:39 +0530
commit29f6db75667f44f3f01ba5037dacaf9ebd9328da (patch)
treea0bd532283b2a545635bae5cc1d6affbfad6be45 /include/exec/target_page.h
parent097ccbbbaf2681df1e65542e5b7d2b2d0c66e2bc (diff)
parent59e1b8a22ea9f947d038ccac784de1020f266e14 (diff)
Merge tag 'pull-target-arm-20220627' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * sphinx: change default language to 'en' * Diagnose attempts to emulate EL3 in hvf as well as kvm * More SME groundwork patches * virt: Fix calculation of physical address space size for v7VE CPUs (eg cortex-a15) # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmK5hKEZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3lggEACtE2balVHrVCeSQkRW+FnS # avm5i54MIGf3cgNhTKwD9ED3hl03Xm49yQkaq0gB6Qa4wQPEcYQLSyzP+UYIILO5 # 3xoWEw0nbtKWBuCzdiolynL1VFht6GV+Ga8lShoBiQsI/eARC6ZELvBv7gbApf4p # DpDq1ty7fXMmMCNM5vgX9fu/LXahSONDXbYMpHpohnaLXCEF9MwqpO5TJf65Bgze # z2+NO4R5u26mCcad7ltoiz3OKkq4Bq+b+QXrm6LmvSCIkvk6MUZuU1NwHSiqUoV/ # nOwhJriOVl8JG0sX0xzNZADYBt0YlcVuDZzyxP8eOiQ54CVK7rJOJSi+aiGkg2Mn # YC4CkFZY9iM5YTA6y6T5mye7kLb/pJ746rLM1ia6Ng3rUwoE9bdvruqTMfPPJuoo # XxMBQrjRjY6BzESG0NbjLgg80dPtqeOipjglYI7GCvh0i2yQVmKLQon5TK9DsScC # 7Gu6IPVWZAb3axGEuqjJ4E+7PyyEW7zYgWNOpZoQW958WHDK0KSPrOwqxAC+QdEi # vagKJGCQPuZiOARpXm6F/nscEDcy7P33z120O9/R6HuticGaM/oBaWy89CR4hbHB # NWx5+0h5M/je8hJFJJVfHldR3nIpvnUtb4KEVoiNuxkrGZoejgTlBdKNL4Nph0U0 # E+CQyMuBBQ88LEbyCjJS5w== # =GILG # -----END PGP SIGNATURE----- # gpg: Signature made Mon 27 Jun 2022 03:51:21 PM +0530 # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] * tag 'pull-target-arm-20220627' of https://git.linaro.org/people/pmaydell/qemu-arm: (25 commits) target/arm: Check V7VE as well as LPAE in arm_pamax target/arm: Extend arm_pamax to more than aarch64 target/arm: Move pred_{full, gvec}_reg_{offset, size} to translate-a64.h target/arm: Add SVL to TB flags target/arm: Introduce sve_vqm1_for_el_sm target/arm: Add cpu properties for SME target/arm: Unexport aarch64_add_*_properties target/arm: Move arm_cpu_*_finalize to internals.h target/arm: Generalize cpu_arm_{get, set}_default_vec_len target/arm: Generalize cpu_arm_{get,set}_vq target/arm: Create ARMVQMap target/arm: Move error for sve%d property to arm_cpu_sve_finalize target/arm: Implement SMSTART, SMSTOP target/arm: Add the SME ZA storage to CPUARMState target/arm: Add PSTATE.{SM,ZA} to TB flags target/arm: Add SMIDR_EL1, SMPRI_EL1, SMPRIMAP_EL2 target/arm: Add SMCR_ELx target/arm: Add SVCR target/arm: Add ARM_CP_SME target/arm: Add syn_smetrap ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include/exec/target_page.h')
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